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Message-ID: <OSAPR01MB4227E8E24A0B282889D21A0D8FE30@OSAPR01MB4227.jpnprd01.prod.outlook.com>
Date: Mon, 16 Nov 2020 06:04:47 +0000
From: "ito-yuichi@...itsu.com" <ito-yuichi@...itsu.com>
To: "ito-yuichi@...itsu.com" <ito-yuichi@...itsu.com>,
"maz@...nel.org" <maz@...nel.org>,
"sumit.garg@...aro.org" <sumit.garg@...aro.org>,
"tglx@...utronix.de" <tglx@...utronix.de>,
"jason@...edaemon.net" <jason@...edaemon.net>,
"catalin.marinas@....com" <catalin.marinas@....com>,
"will@...nel.org" <will@...nel.org>
CC: "linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH v2 0/3] Enable support IPI_CPU_CRASH_STOP to be pseudo-NMI
Hi Marc, Sumit
What should I do to merge this patch.
I would appreciate if you have any advice.
I have not tested it with ThunderX2 yet.
Best regards,
Yuichi Ito
> -----Original Message-----
> From: Yuichi Ito <ito-yuichi@...itsu.com>
> Sent: Wednesday, November 4, 2020 5:06 PM
> To: maz@...nel.org; sumit.garg@...aro.org; tglx@...utronix.de;
> jason@...edaemon.net; catalin.marinas@....com; will@...nel.org
> Cc: linux-arm-kernel@...ts.infradead.org; linux-kernel@...r.kernel.org; Ito,
> Yuichi/伊藤 有一 <ito-yuichi@...itsu.com>
> Subject: [PATCH v2 0/3] Enable support IPI_CPU_CRASH_STOP to be
> pseudo-NMI
>
> This patchset enables IPI_CPU_CRASH_STOP IPI to be pseudo-NMI.
> This allows kdump to collect system information even when the CPU is in a
> HARDLOCKUP state.
>
> Only IPI_CPU_CRASH_STOP uses NMI and the other IPIs remain normal
> IRQs.
>
> The patch has been tested on FX1000.
>
> It also uses some of Sumit's IPI patch set for NMI.[1]
>
> [1]
> https://lore.kernel.org/lkml/1603983387-8738-3-git-send-email-sumit.garg@l
> inaro.org/
>
> $ echo 1 > /proc/sys/kernel/panic_on_rcu_stal
> $ echo HARDLOCKUP > /sys/kernel/debug/provoke-crash/DIRECT
> : kernel panics and crash kernel boot
> : makedumpfile saves the system state at HARDLOCKUP in vmcore.
>
> crash utility:
> #7 [fffffe00290afd30] lkdtm_HARDLOCKUP at fffffe0010857ee8
> #8 [fffffe00290afd40] direct_entry at fffffe0010857c94
> #9 [fffffe00290afd90] full_proxy_write at fffffe001055dea0
> #10 [fffffe00290afdd0] vfs_write at fffffe001047533c
> #11 [fffffe00290afe10] ksys_write at fffffe001047563c
> #12 [fffffe00290afe60] __arm64_sys_write at fffffe00104756e8
> #13 [fffffe00290afe70] do_el0_svc at fffffe00101590cc
> #14 [fffffe00290afea0] el0_svc at fffffe0010147a30
> #15 [fffffe00290afeb0] el0_sync_handler at fffffe001014835c
> #16 [fffffe00290afff0] el0_sync at fffffe0010142c14
>
> Changes in v1:
> - Rebased to head of upstream master.
> - Rebased to Sumit's latest IPIs patch-set [1].
>
> [1]
> https://lore.kernel.org/lkml/1603983387-8738-3-git-send-email-sumit.garg@l
> inaro.org/
>
> - Add conditional branch of local_irq_disable().
>
> Sumit Garg (1):
> irqchip/gic-v3: Enable support for SGIs to act as NMIs
>
> Yuichi Ito (2):
> arch64: smp: Register IPI_CPU_CRASH_STOP IPI as pseudo-NMI
> arch64: smp: Disable priority masking when received NMI on PSR.I section
>
> arch/arm64/kernel/smp.c | 44
> +++++++++++++++++++++++++++++++++++---------
> drivers/irqchip/irq-gic-v3.c | 29 +++++++++++++++++++++--------
> 2 files changed, 56 insertions(+), 17 deletions(-)
>
> --
> 1.8.3.1
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