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Message-ID: <20201116065054.7658-6-stanley.chu@mediatek.com>
Date: Mon, 16 Nov 2020 14:50:50 +0800
From: Stanley Chu <stanley.chu@...iatek.com>
To: <linux-scsi@...r.kernel.org>, <martin.petersen@...cle.com>,
<avri.altman@....com>, <alim.akhtar@...sung.com>,
<jejb@...ux.ibm.com>
CC: <beanhuo@...ron.com>, <asutoshd@...eaurora.org>,
<cang@...eaurora.org>, <kwmad.kim@...sung.com>,
<liwei213@...wei.com>, <matthias.bgg@...il.com>,
<linux-mediatek@...ts.infradead.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <kuohong.wang@...iatek.com>,
<peter.wang@...iatek.com>, <chun-hung.wu@...iatek.com>,
<andy.teng@...iatek.com>, <chaotian.jing@...iatek.com>,
<cc.chou@...iatek.com>, <jiajie.hao@...iatek.com>,
<alice.chao@...iatek.com>, Stanley Chu <stanley.chu@...iatek.com>
Subject: [PATCH v1 5/9] scsi: ufs-exynos: Use device parameter initialization function
Use common device parameter initialization function instead of
initialziing those parameters by vendor driver itself.
Signed-off-by: Stanley Chu <stanley.chu@...iatek.com>
---
drivers/scsi/ufs/ufs-exynos.c | 15 +--------------
drivers/scsi/ufs/ufs-exynos.h | 13 -------------
2 files changed, 1 insertion(+), 27 deletions(-)
diff --git a/drivers/scsi/ufs/ufs-exynos.c b/drivers/scsi/ufs/ufs-exynos.c
index 5e6b95dbb578..a8770ff14588 100644
--- a/drivers/scsi/ufs/ufs-exynos.c
+++ b/drivers/scsi/ufs/ufs-exynos.c
@@ -617,20 +617,7 @@ static int exynos_ufs_pre_pwr_mode(struct ufs_hba *hba,
goto out;
}
-
- ufs_exynos_cap.tx_lanes = UFS_EXYNOS_LIMIT_NUM_LANES_TX;
- ufs_exynos_cap.rx_lanes = UFS_EXYNOS_LIMIT_NUM_LANES_RX;
- ufs_exynos_cap.hs_rx_gear = UFS_EXYNOS_LIMIT_HSGEAR_RX;
- ufs_exynos_cap.hs_tx_gear = UFS_EXYNOS_LIMIT_HSGEAR_TX;
- ufs_exynos_cap.pwm_rx_gear = UFS_EXYNOS_LIMIT_PWMGEAR_RX;
- ufs_exynos_cap.pwm_tx_gear = UFS_EXYNOS_LIMIT_PWMGEAR_TX;
- ufs_exynos_cap.rx_pwr_pwm = UFS_EXYNOS_LIMIT_RX_PWR_PWM;
- ufs_exynos_cap.tx_pwr_pwm = UFS_EXYNOS_LIMIT_TX_PWR_PWM;
- ufs_exynos_cap.rx_pwr_hs = UFS_EXYNOS_LIMIT_RX_PWR_HS;
- ufs_exynos_cap.tx_pwr_hs = UFS_EXYNOS_LIMIT_TX_PWR_HS;
- ufs_exynos_cap.hs_rate = UFS_EXYNOS_LIMIT_HS_RATE;
- ufs_exynos_cap.desired_working_mode =
- UFS_EXYNOS_LIMIT_DESIRED_MODE;
+ ufshcd_init_pwr_dev_param(&ufs_exynos_cap);
ret = ufshcd_get_pwr_dev_param(&ufs_exynos_cap,
dev_max_params, dev_req_params);
diff --git a/drivers/scsi/ufs/ufs-exynos.h b/drivers/scsi/ufs/ufs-exynos.h
index 76d6e39efb2f..06ee565f7eb0 100644
--- a/drivers/scsi/ufs/ufs-exynos.h
+++ b/drivers/scsi/ufs/ufs-exynos.h
@@ -90,19 +90,6 @@ struct exynos_ufs;
#define SLOW 1
#define FAST 2
-#define UFS_EXYNOS_LIMIT_NUM_LANES_RX 2
-#define UFS_EXYNOS_LIMIT_NUM_LANES_TX 2
-#define UFS_EXYNOS_LIMIT_HSGEAR_RX UFS_HS_G3
-#define UFS_EXYNOS_LIMIT_HSGEAR_TX UFS_HS_G3
-#define UFS_EXYNOS_LIMIT_PWMGEAR_RX UFS_PWM_G4
-#define UFS_EXYNOS_LIMIT_PWMGEAR_TX UFS_PWM_G4
-#define UFS_EXYNOS_LIMIT_RX_PWR_PWM SLOW_MODE
-#define UFS_EXYNOS_LIMIT_TX_PWR_PWM SLOW_MODE
-#define UFS_EXYNOS_LIMIT_RX_PWR_HS FAST_MODE
-#define UFS_EXYNOS_LIMIT_TX_PWR_HS FAST_MODE
-#define UFS_EXYNOS_LIMIT_HS_RATE PA_HS_MODE_B
-#define UFS_EXYNOS_LIMIT_DESIRED_MODE FAST
-
#define RX_ADV_FINE_GRAN_SUP_EN 0x1
#define RX_ADV_FINE_GRAN_STEP_VAL 0x3
#define RX_ADV_MIN_ACTV_TIME_CAP 0x9
--
2.18.0
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