linux-kernel - Re: [PATCH 1/2] mmc: sdhci-of-arasan: Use Mask writes for Tap delays

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Message-ID: <98b6be8f-48db-5e7f-5fd7-825432235e06@xilinx.com>
Date:   Mon, 16 Nov 2020 08:07:12 +0100
From:   Michal Simek <michal.simek@...inx.com>
To:     Manish Narani <manish.narani@...inx.com>,
        <michal.simek@...inx.com>, <adrian.hunter@...el.com>,
        <ulf.hansson@...aro.org>
CC:     <linux-arm-kernel@...ts.infradead.org>,
        <linux-mmc@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <git@...inx.com>,
        Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@...inx.com>
Subject: Re: [PATCH 1/2] mmc: sdhci-of-arasan: Use Mask writes for Tap delays



On 16. 11. 20 7:15, Manish Narani wrote:
> Mask the ITAP and OTAP delay bits before updating with the new
> tap value for Versal platform.
> 
> Fixes: 1a470721c8f5 ("sdhci: arasan: Add support for Versal Tap Delays")
> Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@...inx.com>
> Signed-off-by: Manish Narani <manish.narani@...inx.com>
> ---
>  drivers/mmc/host/sdhci-of-arasan.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c
> index 100621e55427..3ec5ecad637c 100644
> --- a/drivers/mmc/host/sdhci-of-arasan.c
> +++ b/drivers/mmc/host/sdhci-of-arasan.c
> @@ -30,7 +30,10 @@
>  #define SDHCI_ARASAN_VENDOR_REGISTER	0x78
>  
>  #define SDHCI_ARASAN_ITAPDLY_REGISTER	0xF0F8
> +#define SDHCI_ARASAN_ITAPDLY_SEL_MASK	0xFF
> +
>  #define SDHCI_ARASAN_OTAPDLY_REGISTER	0xF0FC
> +#define SDHCI_ARASAN_OTAPDLY_SEL_MASK	0x3F
>  
>  #define SDHCI_ARASAN_CQE_BASE_ADDR	0x200
>  #define VENDOR_ENHANCED_STROBE		BIT(0)
> @@ -755,6 +758,7 @@ static int sdhci_versal_sdcardclk_set_phase(struct clk_hw *hw, int degrees)
>  		regval = sdhci_readl(host, SDHCI_ARASAN_OTAPDLY_REGISTER);
>  		regval |= SDHCI_OTAPDLY_ENABLE;
>  		sdhci_writel(host, regval, SDHCI_ARASAN_OTAPDLY_REGISTER);
> +		regval &= ~SDHCI_ARASAN_OTAPDLY_SEL_MASK;
>  		regval |= tap_delay;
>  		sdhci_writel(host, regval, SDHCI_ARASAN_OTAPDLY_REGISTER);
>  	}
> @@ -822,6 +826,7 @@ static int sdhci_versal_sampleclk_set_phase(struct clk_hw *hw, int degrees)
>  		sdhci_writel(host, regval, SDHCI_ARASAN_ITAPDLY_REGISTER);
>  		regval |= SDHCI_ITAPDLY_ENABLE;
>  		sdhci_writel(host, regval, SDHCI_ARASAN_ITAPDLY_REGISTER);
> +		regval &= ~SDHCI_ARASAN_ITAPDLY_SEL_MASK;
>  		regval |= tap_delay;
>  		sdhci_writel(host, regval, SDHCI_ARASAN_ITAPDLY_REGISTER);
>  		regval &= ~SDHCI_ITAPDLY_CHGWIN;
> 

Acked-by: Michal Simek <michal.simek@...inx.com>

Thanks,
Michal