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Message-ID: <20201117110330.00004adb@Huawei.com>
Date: Tue, 17 Nov 2020 11:03:30 +0000
From: Jonathan Cameron <Jonathan.Cameron@...wei.com>
To: Alexandru Ardelean <alexandru.ardelean@...log.com>
CC: <linux-iio@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <jic23@...nel.org>,
<robh+dt@...nel.org>
Subject: Re: [PATCH 3/3] dt-bindings: adc: ad7887: add binding doc for
AD7887
On Tue, 17 Nov 2020 09:52:54 +0200
Alexandru Ardelean <alexandru.ardelean@...log.com> wrote:
> This change adds a simple device-tree binding for thhe Analog Devices
> AD7887 ADC.
>
> Signed-off-by: Alexandru Ardelean <alexandru.ardelean@...log.com>
Binding looks good to me.
Jonathan
> ---
> .../bindings/iio/adc/adi,ad7887.yaml | 70 +++++++++++++++++++
> 1 file changed, 70 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/iio/adc/adi,ad7887.yaml
>
> diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7887.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7887.yaml
> new file mode 100644
> index 000000000000..9b30f4569b4e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7887.yaml
> @@ -0,0 +1,70 @@
> +# SPDX-License-Identifier: GPL-2.0
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/iio/adc/adi,ad7887.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Analog Devices AD7887 low power, 12-bit ADC
> +
> +maintainers:
> + - Michael Hennerich <michael.hennerich@...log.com>
> +
> +description: |
> + Analog Devices AD7887 low power, 12-bit analog-to-digital converter (ADC)
> + that operates from a single 2.7 V to 5.25 V power supply.
> +
> +properties:
> + compatible:
> + enum:
> + - adi,ad7887
> +
> + reg:
> + maxItems: 1
> +
> + spi-cpha: true
> +
> + spi-cpol: true
> +
> + avcc-supply: true
> +
> + spi-max-frequency: true
> +
> + vref-supply:
> + description:
> + ADC reference voltage supply
> +
> + adi,dual-channel-mode:
> + description:
> + Configures dual-channel mode for the ADC. In dual-channel operation,
> + the AIN1/VREF pin assumes its AIN1 function, providing a second analog
> + input channel. In this case, he reference voltage for the part is provided
> + via the VDD pin. As a result, the input voltage range on both the AIN0 and
> + AIN1 inputs is 0 to VDD.
> + type: boolean
> +
> +additionalProperties: false
> +
> +required:
> + - compatible
> + - reg
> + - spi-cpha
> + - spi-cpol
> +
> +examples:
> + - |
> + spi0 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + adc@0 {
> + compatible = "adi,ad7887";
> + reg = <0>;
> + spi-max-frequency = <1000000>;
> + spi-cpol;
> + spi-cpha;
> +
> + avcc-supply = <&adc_supply>;
> + vref-supply = <&adc_vref>;
> + };
> + };
> +...
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