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Message-ID: <36532dfd-4e13-79b2-d29f-d7684f638b22@linaro.org>
Date: Wed, 18 Nov 2020 14:58:19 -0500
From: Thara Gopinath <thara.gopinath@...aro.org>
To: Bjorn Andersson <bjorn.andersson@...aro.org>
Cc: agross@...nel.org, herbert@...dor.apana.org.au,
davem@...emloft.net, robh+dt@...nel.org, sboyd@...nel.org,
mturquette@...libre.com, linux-arm-msm@...r.kernel.org,
linux-crypto@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org
Subject: Re: [PATCH 5/6] dts:qcom:sdm845: Add dt entries to support crypto
engine.
On 11/17/20 11:10 PM, Bjorn Andersson wrote:
> On Tue 17 Nov 07:47 CST 2020, Thara Gopinath wrote:
>
>> Add crypto engine (CE) and CE BAM related nodes and definitions to
>> "sdm845.dtsi".
>>
>> Signed-off-by: Thara Gopinath <thara.gopinath@...aro.org>
>> ---
>> arch/arm64/boot/dts/qcom/sdm845.dtsi | 30 ++++++++++++++++++++++++++++
>> 1 file changed, 30 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
>> index 40e8c11f23ab..b5b2ea97681f 100644
>> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
>> @@ -2138,6 +2138,36 @@ ufs_mem_phy_lanes: lanes@...7400 {
>> };
>> };
>>
>> + cryptobam: dma@...4000 {
>> + compatible = "qcom,bam-v1.7.0";
>> + reg = <0 0x01dc4000 0 0x24000>;
>> + interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&rpmhcc RPMH_CE_CLK>;
>> + clock-names = "bam_clk";
>> + #dma-cells = <1>;
>> + qcom,ee = <0>;
>> + qcom,controlled-remotely = <1>;
>> + iommus = <&apps_smmu 0x704 0x1>,
>> + <&apps_smmu 0x706 0x1>,
>> + <&apps_smmu 0x714 0x1>,
>> + <&apps_smmu 0x716 0x1>;
>
> Can you confirm that this can't be written as:
>
> iommus = <&apps_smmu 0x704 0x3>,
> <&apps_smmu 0x714 0x3>;
>
> (and same below).
Hi Bjorn,
Thanks for the reviews. Yes, I can confirm that the above does not work.
The tests hang. I will fix rest of your comments and post v2.
--
Warm Regards
Thara
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