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Message-ID: <CAHCN7xLxUHoc=VFHhbo36ytCLMc11a8DbD1Gh5eK2vogO=75Ww@mail.gmail.com>
Date: Wed, 18 Nov 2020 17:13:54 -0600
From: Adam Ford <aford173@...il.com>
To: arm-soc <linux-arm-kernel@...ts.infradead.org>
Cc: Adam Ford-BE <aford@...conembedded.com>,
Rob Herring <robh+dt@...nel.org>,
Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
NXP Linux Team <linux-imx@....com>,
devicetree <devicetree@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH V4 2/5] arm64: dts: imx8mn: Enable Asynchronous Sample
Rate Converter
On Sat, Nov 7, 2020 at 5:58 AM Adam Ford <aford173@...il.com> wrote:
>
> The driver exists for the Enhanced Asynchronous Sample Rate Converter
> (EASRC) Controller, but there isn't a device tree entry for it.
>
> On the vendor kernel, they put this on a spba-bus for SDMA support.
>
> Add the node for the spba-bus with the easrc node inside.
>
> Signed-off-by: Adam Ford <aford173@...il.com>
Shawn,
I split the dt-binding into a separate patch since I was struggling
with checking the yaml syntax. Rob helped me find the proper branch
to use. I hope it goes through this time.
Do you have any comments on the rest of the series? I would like to
fix them if you have any concerns so I can resend if/when the
dt-binding is accepted.
thanks,
adam
> ---
> V4: No change
> V3: Change spba-bus@...00000 to spba: bus@...00000
> V2: Make the DT node more in-line with the dt binding and remove
> vendor customizations that are not applicable.
> arch/arm64/boot/dts/freescale/imx8mn.dtsi | 28 +++++++++++++++++++++++
> 1 file changed, 28 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> index a06d2a6268e6..61560c083300 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> @@ -253,6 +253,34 @@ aips1: bus@...00000 {
> #size-cells = <1>;
> ranges;
>
> + spba: bus@...00000 {
> + compatible = "fsl,spba-bus", "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + reg = <0x30000000 0x100000>;
> + ranges;
> +
> + easrc: easrc@...c0000 {
> + compatible = "fsl,imx8mn-easrc";
> + reg = <0x300c0000 0x10000>;
> + interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MN_CLK_ASRC_ROOT>;
> + clock-names = "mem";
> + dmas = <&sdma2 16 23 0> , <&sdma2 17 23 0>,
> + <&sdma2 18 23 0> , <&sdma2 19 23 0>,
> + <&sdma2 20 23 0> , <&sdma2 21 23 0>,
> + <&sdma2 22 23 0> , <&sdma2 23 23 0>;
> + dma-names = "ctx0_rx", "ctx0_tx",
> + "ctx1_rx", "ctx1_tx",
> + "ctx2_rx", "ctx2_tx",
> + "ctx3_rx", "ctx3_tx";
> + firmware-name = "imx/easrc/easrc-imx8mn.bin";
> + fsl,asrc-rate = <8000>;
> + fsl,asrc-format = <2>;
> + status = "disabled";
> + };
> + };
> +
> gpio1: gpio@...00000 {
> compatible = "fsl,imx8mn-gpio", "fsl,imx35-gpio";
> reg = <0x30200000 0x10000>;
> --
> 2.25.1
>
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