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Message-ID: <20201118074253.20881-1-peter.ujfalusi@ti.com>
Date: Wed, 18 Nov 2020 09:42:53 +0200
From: Peter Ujfalusi <peter.ujfalusi@...com>
To: <ssantosh@...nel.org>, <santosh.shilimkar@...cle.com>
CC: <linux-arm-kernel@...ts.infradead.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<nsekhar@...com>, <tomi.valkeinen@...com>, <jsarha@...com>
Subject: [PATCH v2] ARM: dts: keystone-k2g-evm: add HDMI and analog audio data
The board is using McASP2 for both analog (tlv320aic3106) and
HDMI (SiI9022) audio.
12.288MHz oscillator provides the MCLK for both aic3106 and SiI9022.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@...com>
---
Hi,
Changes since v1:
- Rename the sii9022_mclk ficed clock to aud_mclk (as it is named in the schema)
and use it within the sound card dai nodes for the codecs.
Regards,
Peter
arch/arm/boot/dts/keystone-k2g-evm.dts | 112 +++++++++++++++++++++++++
1 file changed, 112 insertions(+)
diff --git a/arch/arm/boot/dts/keystone-k2g-evm.dts b/arch/arm/boot/dts/keystone-k2g-evm.dts
index 8b3d64c913d8..14e26a4fd62a 100644
--- a/arch/arm/boot/dts/keystone-k2g-evm.dts
+++ b/arch/arm/boot/dts/keystone-k2g-evm.dts
@@ -46,6 +46,14 @@ vcc1v8_ldo1_reg: fixedregulator-vcc1v8-ldo1 {
regulator-always-on;
};
+ vcc1v8_ldo2_reg: fixedregulator-vcc1v8-ldo2 {
+ compatible = "regulator-fixed";
+ regulator-name = "ldo2";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
+
hdmi: connector {
compatible = "hdmi-connector";
label = "hdmi";
@@ -58,6 +66,57 @@ hdmi_connector_in: endpoint {
};
};
};
+
+ aud_mclk: aud_mclk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <12288000>;
+ };
+
+ sound0: sound@0 {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "K2G-EVM";
+ simple-audio-card,widgets =
+ "Headphone", "Headphone Jack",
+ "Line", "Line In";
+ simple-audio-card,routing =
+ "Headphone Jack", "HPLOUT",
+ "Headphone Jack", "HPROUT",
+ "LINE1L", "Line In",
+ "LINE1R", "Line In";
+
+ simple-audio-card,dai-link@0 {
+ format = "i2s";
+ bitclock-master = <&sound0_0_master>;
+ frame-master = <&sound0_0_master>;
+ sound0_0_master: cpu {
+ sound-dai = <&mcasp2>;
+ clocks = <&k2g_clks 0x6 1>;
+ system-clock-direction-out;
+ };
+
+ codec {
+ sound-dai = <&tlv320aic3106>;
+ clocks = <&aud_mclk>;
+ };
+ };
+
+ simple-audio-card,dai-link@1 {
+ format = "i2s";
+ bitclock-master = <&sound0_1_master>;
+ frame-master = <&sound0_1_master>;
+ sound0_1_master: cpu {
+ sound-dai = <&mcasp2>;
+ clocks = <&k2g_clks 0x6 1>;
+ system-clock-direction-out;
+ };
+
+ codec {
+ sound-dai = <&sii9022>;
+ clocks = <&aud_mclk>;
+ };
+ };
+ };
};
&k2g_pinctrl {
@@ -214,6 +273,15 @@ K2G_CORE_IOPAD(0x10e4) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssde.dssd
K2G_CORE_IOPAD(0x10e8) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssfid.dssfid */
>;
};
+
+ mcasp2_pins: pinmux_mcasp2_pins {
+ pinctrl-single,pins = <
+ K2G_CORE_IOPAD(0x1234) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE4) /* pr0_pru_gpo2.mcasp2_axr2 */
+ K2G_CORE_IOPAD(0x1238) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE4) /* pr0_pru_gpo3.mcasp2_axr3 */
+ K2G_CORE_IOPAD(0x1254) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE4) /* pr0_pru_gpo10.mcasp2_afsx */
+ K2G_CORE_IOPAD(0x125c) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE4) /* pr0_pru_gpo12.mcasp2_aclkx */
+ >;
+ };
};
&uart0 {
@@ -423,6 +491,10 @@ sii9022: sii9022@3b {
compatible = "sil,sii9022";
reg = <0x3b>;
+ sil,i2s-data-lanes = < 0 >;
+ clocks = <&aud_mclk>;
+ clock-names = "mclk";
+
ports {
#address-cells = <1>;
#size-cells = <0>;
@@ -444,6 +516,19 @@ sii9022_out: endpoint {
};
};
};
+
+ tlv320aic3106: tlv320aic3106@1b {
+ #sound-dai-cells = <0>;
+ compatible = "ti,tlv320aic3106";
+ reg = <0x1b>;
+ status = "okay";
+
+ /* Regulators */
+ AVDD-supply = <&vcc3v3_dcin_reg>;
+ IOVDD-supply = <&vcc3v3_dcin_reg>;
+ DRVDD-supply = <&vcc3v3_dcin_reg>;
+ DVDD-supply = <&vcc1v8_ldo2_reg>;
+ };
};
&dss {
@@ -458,3 +543,30 @@ dpi_out: endpoint {
};
};
};
+
+&k2g_clks {
+ /* on the board 22.5792MHz is connected to AUDOSC_IN */
+ assigned-clocks = <&k2g_clks 0x4c 2>;
+ assigned-clock-rates = <22579200>;
+};
+
+&mcasp2 {
+ #sound-dai-cells = <0>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&mcasp2_pins>;
+
+ assigned-clocks = <&k2g_clks 0x6 1>;
+ assigned-clock-parents = <&k2g_clks 0x6 2>;
+
+ status = "okay";
+
+ op-mode = <0>; /* MCASP_IIS_MODE */
+ tdm-slots = <2>;
+ /* 6 serializer */
+ serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
+ 0 0 1 2 0 0 // AXR2: TX, AXR3: rx
+ >;
+ tx-num-evt = <32>;
+ rx-num-evt = <32>;
+};
--
Peter
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
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