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Message-ID: <57185bb30aa1932976e2276d4d287db7cf0304a0.1605693132.git.wilken.gottwalt@posteo.net>
Date: Wed, 18 Nov 2020 11:01:59 +0100
From: Wilken Gottwalt <wilken.gottwalt@...teo.net>
To: linux-kernel@...r.kernel.org
Cc: Ohad Ben-Cohen <ohad@...ery.com>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Baolin Wang <baolin.wang7@...il.com>,
Rob Herring <robh+dt@...nel.org>,
Maxime Ripard <mripard@...nel.org>,
Chen-Yu Tsai <wens@...e.org>,
Jernej Skrabec <jernej.skrabec@...l.net>
Subject: [PATCH 1/2] dt-bindings: hwlock: sunxi: add sunxi_hwspinlock
documentation
Adds documentation on how to use/enable the sunxi_hwspinlock driver.
Signed-off-by: Wilken Gottwalt <wilken.gottwalt@...teo.net>
---
.../bindings/hwlock/sunxi-hwspinlock.yaml | 64 +++++++++++++++++++
1 file changed, 64 insertions(+)
create mode 100644 Documentation/devicetree/bindings/hwlock/sunxi-hwspinlock.yaml
diff --git a/Documentation/devicetree/bindings/hwlock/sunxi-hwspinlock.yaml b/Documentation/devicetree/bindings/hwlock/sunxi-hwspinlock.yaml
new file mode 100644
index 000000000000..773eaa6b33ca
--- /dev/null
+++ b/Documentation/devicetree/bindings/hwlock/sunxi-hwspinlock.yaml
@@ -0,0 +1,64 @@
+# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/hwlock/sunxi-hwspinlock.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: SUNXI hardware spinlock for Allwinner based SoCs
+
+maintainers:
+ - Wilken Gottwalt <wilken.gottwalt@...teo.net>
+
+properties:
+ compatible:
+ enum:
+ - allwinner,sun8i-hwspinlock
+ - allwinner,sun50i-hwspinlock
+
+ reg: # 0x01C18000 (H2+, H3, H5), 0x03004000 (H6), length 0x400 (max 256 * 32bit)
+ maxItems: 1
+
+ clocks: # phandle to the reference clock
+ maxItems: 1
+
+ clock-names: # name of the bus ("ahb")
+ maxItems: 1
+
+ resets: # phandle to the reset control
+ maxItems: 1
+
+ reset-names: # name of the bus ("ahb")
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - resets
+ - reset-names
+
+additionalProperties: false
+
+examples:
+
+ - |
+ /* H2+ based OrangePi Zero */
+ hwspinlock: hwspinlock@...8000 {
+ compatible = "allwinner,sun8i-hwspinlock";
+ reg = <0x01c18000 0x400>;
+ clocks = <&ccu CLK_BUS_SPINLOCK>;
+ clock-names = "ahb";
+ resets = <&ccu RST_BUS_SPINLOCK>;
+ reset-names = "ahb";
+ };
+
+ /* H6 based OrangePi 3 */
+ hwspinlock: hwspinlock@...4000 {
+ compatible = "allwinner,sun50i-hwspinlock";
+ reg = <0x03004000 0x400>;
+ clocks = <&ccu CLK_BUS_SPINLOCK>;
+ clock-names = "ahb";
+ resets = <&ccu RST_BUS_SPINLOCK>;
+ reset-names = "ahb";
+ };
--
2.29.2
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