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Message-ID: <20201118144626.32189-1-vidyas@nvidia.com>
Date:   Wed, 18 Nov 2020 20:16:24 +0530
From:   Vidya Sagar <vidyas@...dia.com>
To:     <jingoohan1@...il.com>, <gustavo.pimentel@...opsys.com>,
        <lorenzo.pieralisi@....com>, <bhelgaas@...gle.com>,
        <amurray@...goodpenguin.co.uk>, <robh@...nel.org>,
        <treding@...dia.com>, <jonathanh@...dia.com>
CC:     <linux-pci@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <kthota@...dia.com>, <mmaddireddy@...dia.com>, <vidyas@...dia.com>,
        <sagar.tv@...il.com>
Subject: [PATCH V2 0/2] Add support to handle prefetchable memory

This patch series adds support for configuring the DesignWare IP's ATU
region for prefetchable memory translations.
It first starts by flagging a warning if the size of non-prefetchable
aperture goes beyond 32-bit as PCIe spec doesn't allow it.
And then adds required support for programming the ATU to handle higher
(i.e. >4GB) sizes.

V2:
* Dropped third patch from the series as Rob's patch
  (commit: 9fff3256f93d PCI: dwc: Restore ATU memory resource setup to use last entry)
  is already accepted
* Rebased first two patches on top of Rob's latest patch
  http://patchwork.ozlabs.org/project/linux-pci/patch/20201026181652.418729-1-robh@kernel.org/

Vidya Sagar (2):
  PCI: of: Warn if non-prefetchable memory aperture size is > 32-bit
  PCI: dwc: Add support to program ATU for >4GB memory

 drivers/pci/controller/dwc/pcie-designware.c | 12 +++++++-----
 drivers/pci/controller/dwc/pcie-designware.h |  3 ++-
 drivers/pci/of.c                             |  5 +++++
 3 files changed, 14 insertions(+), 6 deletions(-)

-- 
2.17.1

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