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Message-Id: <20201119164547.2982871-26-suzuki.poulose@arm.com>
Date: Thu, 19 Nov 2020 16:45:47 +0000
From: Suzuki K Poulose <suzuki.poulose@....com>
To: linux-arm-kernel@...ts.infradead.org
Cc: mathieu.poirier@...aro.org, mike.leach@...aro.org,
linux-kernel@...r.kernel.org, anshuman.khandual@....com,
jonathan.zhouwen@...wei.com, coresight@...ts.linaro.org,
Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will@...nel.org>,
Suzuki K Poulose <suzuki.poulose@....com>
Subject: [PATCH v4 25/25] coresight: Add support for v8.4 SelfHosted tracing
From: Jonathan Zhou <jonathan.zhouwen@...wei.com>
v8.4 tracing extensions added support for trace filtering controlled
by TRFCR_ELx. This must be programmed to allow tracing at EL1/EL2 and
EL0. The timestamp used is the virtual time. Also enable CONTEXIDR_EL2
tracing if we are running the kernel at EL2.
Cc: Catalin Marinas <catalin.marinas@....com>
Cc: Mathieu Poirier <mathieu.poirier@...aro.org>
Cc: Mike Leach <mike.leach@...aro.org>
Cc: Will Deacon <will@...nel.org>
Signed-off-by: Jonathan Zhou <jonathan.zhouwen@...wei.com>
[ Move the trace filtering setup etm_init_arch_data() and
clean ups]
Signed-off-by: Suzuki K Poulose <suzuki.poulose@....com>
---
.../coresight/coresight-etm4x-core.c | 25 +++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c
index 1d054d2ab2a0..647685736134 100644
--- a/drivers/hwtracing/coresight/coresight-etm4x-core.c
+++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c
@@ -760,6 +760,30 @@ static bool etm4_init_csdev_access(struct etmv4_drvdata *drvdata,
return false;
}
+static void cpu_enable_tracing(void)
+{
+ u64 dfr0 = read_sysreg(id_aa64dfr0_el1);
+ u64 trfcr;
+
+ if (!(dfr0 >> ID_AA64DFR0_TRACE_FILT_SHIFT))
+ return;
+
+ /*
+ * If the CPU supports v8.4 SelfHosted Tracing, enable
+ * tracing at the kernel EL and EL0, forcing to use the
+ * virtual time as the timestamp.
+ */
+ trfcr = (TRFCR_ELx_TS_VIRTUAL |
+ TRFCR_ELx_ExTRE |
+ TRFCR_ELx_E0TRE);
+
+ /* If we are running at EL2, allow tracing the CONTEXTIDR_EL2. */
+ if (is_kernel_in_hyp_mode())
+ trfcr |= TRFCR_EL2_CX;
+
+ write_sysreg_s(trfcr, SYS_TRFCR_EL1);
+}
+
static void etm4_init_arch_data(void *info)
{
u32 etmidr0;
@@ -943,6 +967,7 @@ static void etm4_init_arch_data(void *info)
/* NUMCNTR, bits[30:28] number of counters available for tracing */
drvdata->nr_cntr = BMVAL(etmidr5, 28, 30);
etm4_cs_lock(drvdata, csa);
+ cpu_enable_tracing();
}
static inline u32 etm4_get_victlr_access_type(struct etmv4_config *config)
--
2.24.1
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