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Message-Id: <20201119092957.16940-1-chenyi.qiang@intel.com>
Date: Thu, 19 Nov 2020 17:29:55 +0800
From: Chenyi Qiang <chenyi.qiang@...el.com>
To: Paolo Bonzini <pbonzini@...hat.com>,
Sean Christopherson <sean.j.christopherson@...el.com>,
Vitaly Kuznetsov <vkuznets@...hat.com>,
Wanpeng Li <wanpengli@...cent.com>,
Jim Mattson <jmattson@...gle.com>,
Joerg Roedel <joro@...tes.org>,
Xiaoyao Li <xiaoyao.li@...el.com>
Cc: kvm@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: [RFC PATCH 0/2] Add KVM support for bus lock debug exception
A bus lock is acquired either through split locked access to writeback
(WB) memory or by using locks to uncacheable (UC) memory. This is
typically > 1000 cycles slower than atomic opertaion within a cache
line. It also disrupts performance on other cores.
Bus lock debug exception is a sub-feature of bus lock detection. It is
an ability to notify the kernel by an #DB trap after the instruction
acquires a bus lock when CPL>0. This allows the kernel to enforce user
application throttling or mitigatioins.
Expose the bus lock debug exception to guest by the enumeration of
CPUID.(EAX=7,ECX=0).ECX[24]. Software in guest can enable these
exceptions by setting the DEBUGCTLMSR_BUS_LOCK_DETECT(bit 2) of
MSR_IA32_DEBUTCTL. This patch series add the MSR handling for
DEBUGCTLMSR_BUS_LOCK_DETECT.
The bus lock #DB exception can alse be intercepted by the VMM and
identified through the bit 11 of the exit qualification at VM exit. The
bit 11 (DR6_BUS_LOCK) of DR6 register is introduced to indicate a bus
lock #DB exception. DR6_BUS_LOCK has formerly always been 1 and delivery
of a bus lock #DB clears it. The VMM should emulate the exceptions by
clearing the bit 11 of the guest DR6.
The kernel RFC patch set for bus lock debug exception is available at
https://lore.kernel.org/lkml/20201111192048.2602065-1-fenghua.yu@intel.com/
Document for Bus Lock Detection is now available at the latest "Intel
Architecture Instruction Set Extensions Programming Reference".
Document Link:
https://software.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html
Chenyi Qiang (2):
KVM: X86: Add support for the emulation of DR6_BUS_LOCK bit
KVM: X86: Expose bus lock debug exception to guest
arch/x86/include/asm/kvm_host.h | 5 ++--
arch/x86/kvm/cpuid.c | 3 ++-
arch/x86/kvm/emulate.c | 2 +-
arch/x86/kvm/svm/svm.c | 6 ++---
arch/x86/kvm/vmx/nested.c | 2 +-
arch/x86/kvm/vmx/vmx.c | 29 +++++++++++++++++++---
arch/x86/kvm/x86.c | 44 ++++++++++++++-------------------
arch/x86/kvm/x86.h | 2 ++
8 files changed, 56 insertions(+), 37 deletions(-)
--
2.17.1
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