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Message-ID: <20201119200129.28532-1-gengdongjiu@huawei.com>
Date: Thu, 19 Nov 2020 20:01:25 +0000
From: Dongjiu Geng <gengdongjiu@...wei.com>
To: <mturquette@...libre.com>, <sboyd@...nel.org>,
<robh+dt@...nel.org>, <vkoul@...nel.org>,
<dan.j.williams@...el.com>, <p.zabel@...gutronix.de>,
<gengdongjiu@...wei.com>, <devicetree@...r.kernel.org>,
<linux-clk@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<dmaengine@...r.kernel.org>
Subject: [PATCH v5 0/4] Enable Hi3559A SOC clock and HiSilicon Hiedma Controller
v4->v5:
1. change the patch author mail name
v3->v4:
1. fix the 'make dt_binding_check' issues.
2. Combine the 'Enable HiSilicon Hiedma Controller' series patches to this series.
3. fix the 'make dt_binding_check' issues in 'Enable HiSilicon Hiedma Controller' patchset
v2->v3:
1. change dt-bindings documents from txt to yaml format.
2. Add SHUB clock to access the devices of m7
Dongjiu Geng (4):
dt-bindings: Document the hi3559a clock bindings
clk: hisilicon: Add clock driver for hi3559A SoC
dt: bindings: dma: Add DT bindings for HiSilicon Hiedma Controller
dmaengine: dma: Add Hiedma Controller v310 Device Driver
.../clock/hisilicon,hi3559av100-clock.yaml | 66 +
.../bindings/dma/hisilicon,hiedmacv310.yaml | 103 ++
drivers/clk/hisilicon/Kconfig | 7 +
drivers/clk/hisilicon/Makefile | 1 +
drivers/clk/hisilicon/clk-hi3559a.c | 865 ++++++++++
drivers/dma/Kconfig | 14 +
drivers/dma/Makefile | 1 +
drivers/dma/hiedmacv310.c | 1441 +++++++++++++++++
drivers/dma/hiedmacv310.h | 136 ++
include/dt-bindings/clock/hi3559av100-clock.h | 165 ++
10 files changed, 2799 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/hisilicon,hi3559av100-clock.yaml
create mode 100644 Documentation/devicetree/bindings/dma/hisilicon,hiedmacv310.yaml
create mode 100644 drivers/clk/hisilicon/clk-hi3559a.c
create mode 100644 drivers/dma/hiedmacv310.c
create mode 100644 drivers/dma/hiedmacv310.h
create mode 100644 include/dt-bindings/clock/hi3559av100-clock.h
--
2.17.1
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