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Message-ID: <20201120170903.GC3377168@google.com>
Date: Fri, 20 Nov 2020 09:09:03 -0800
From: Minchan Kim <minchan@...nel.org>
To: Will Deacon <will@...nel.org>
Cc: linux-kernel@...r.kernel.org, kernel-team@...roid.com,
Catalin Marinas <catalin.marinas@....com>,
Yu Zhao <yuzhao@...gle.com>,
Peter Zijlstra <peterz@...radead.org>,
Linus Torvalds <torvalds@...ux-foundation.org>,
Anshuman Khandual <anshuman.khandual@....com>,
linux-mm@...ck.org, linux-arm-kernel@...ts.infradead.org,
stable@...r.kernel.org
Subject: Re: [PATCH 2/6] arm64: pgtable: Ensure dirty bit is preserved across
pte_wrprotect()
On Fri, Nov 20, 2020 at 02:35:53PM +0000, Will Deacon wrote:
> With hardware dirty bit management, calling pte_wrprotect() on a writable,
> dirty PTE will lose the dirty state and return a read-only, clean entry.
>
> Move the logic from ptep_set_wrprotect() into pte_wrprotect() to ensure that
> the dirty bit is preserved for writable entries, as this is required for
> soft-dirty bit management if we enable it in the future.
>
> Cc: <stable@...r.kernel.org>
It this stable material if it would be a problem once ARM64 supports
softdirty in future?
> Signed-off-by: Will Deacon <will@...nel.org>
> ---
> arch/arm64/include/asm/pgtable.h | 27 ++++++++++++++-------------
> 1 file changed, 14 insertions(+), 13 deletions(-)
>
> diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h
> index 1bdf51f01e73..a155551863c9 100644
> --- a/arch/arm64/include/asm/pgtable.h
> +++ b/arch/arm64/include/asm/pgtable.h
> @@ -162,13 +162,6 @@ static inline pmd_t set_pmd_bit(pmd_t pmd, pgprot_t prot)
> return pmd;
> }
>
> -static inline pte_t pte_wrprotect(pte_t pte)
> -{
> - pte = clear_pte_bit(pte, __pgprot(PTE_WRITE));
> - pte = set_pte_bit(pte, __pgprot(PTE_RDONLY));
> - return pte;
> -}
> -
> static inline pte_t pte_mkwrite(pte_t pte)
> {
> pte = set_pte_bit(pte, __pgprot(PTE_WRITE));
> @@ -194,6 +187,20 @@ static inline pte_t pte_mkdirty(pte_t pte)
> return pte;
> }
>
> +static inline pte_t pte_wrprotect(pte_t pte)
> +{
> + /*
> + * If hardware-dirty (PTE_WRITE/DBM bit set and PTE_RDONLY
> + * clear), set the PTE_DIRTY bit.
> + */
> + if (pte_hw_dirty(pte))
> + pte = pte_mkdirty(pte);
> +
> + pte = clear_pte_bit(pte, __pgprot(PTE_WRITE));
> + pte = set_pte_bit(pte, __pgprot(PTE_RDONLY));
> + return pte;
> +}
> +
> static inline pte_t pte_mkold(pte_t pte)
> {
> return clear_pte_bit(pte, __pgprot(PTE_AF));
> @@ -843,12 +850,6 @@ static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addres
> pte = READ_ONCE(*ptep);
> do {
> old_pte = pte;
> - /*
> - * If hardware-dirty (PTE_WRITE/DBM bit set and PTE_RDONLY
> - * clear), set the PTE_DIRTY bit.
> - */
> - if (pte_hw_dirty(pte))
> - pte = pte_mkdirty(pte);
> pte = pte_wrprotect(pte);
> pte_val(pte) = cmpxchg_relaxed(&pte_val(*ptep),
> pte_val(old_pte), pte_val(pte));
> --
> 2.29.2.454.gaff20da3a2-goog
>
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