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Date:   Fri, 20 Nov 2020 11:53:29 +0100
From:   Krzysztof Kozlowski <krzk@...nel.org>
To:     Alice Guo <alice.guo@....com>
Cc:     robh+dt@...nel.org, shawnguo@...nel.org, s.hauer@...gutronix.de,
        linux-imx@....com, peng.fan@....com, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v4 3/4] arm64: dts: imx8m: add NVMEM provider and
 consumer to read soc unique ID

On Fri, Nov 20, 2020 at 06:11:11PM +0800, Alice Guo wrote:
> In order to be able to use NVMEM APIs to read soc unique ID, add the
> nvmem data cell and name for nvmem-cells to the "soc" node, and add a
> nvmem node which provides soc unique ID to efuse@...50000.
> 
> v2: remove the subject prefix "LF-2571-3"
> v3: convert register addresses and sizes to hex
> v4: delete "stuff" in subject and commit message, add detailed
>     description
> 
> Signed-off-by: Alice Guo <alice.guo@....com>
> ---
>  arch/arm64/boot/dts/freescale/imx8mm.dtsi | 6 ++++++
>  arch/arm64/boot/dts/freescale/imx8mn.dtsi | 6 ++++++
>  arch/arm64/boot/dts/freescale/imx8mp.dtsi | 6 ++++++
>  arch/arm64/boot/dts/freescale/imx8mq.dtsi | 6 ++++++
>  4 files changed, 24 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> index d457ce815e68..0e0edd5db07b 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> @@ -261,6 +261,8 @@
>  		#address-cells = <1>;
>  		#size-cells = <1>;
>  		ranges = <0x0 0x0 0x0 0x3e000000>;
> +		nvmem-cells = <&imx8mm_uid>;
> +		nvmem-cell-names = "soc_unique_id";
> 
>  		aips1: bus@...00000 {
>  			compatible = "fsl,aips-bus", "simple-bus";
> @@ -518,6 +520,10 @@
>  				#address-cells = <1>;
>  				#size-cells = <1>;
> 
> +				imx8mm_uid: unique_id@410 {

Any reason why device node uses underscore, not a hyphen/dash? Other
fields are proper (it's also naming convention of DT spec and dtc W=2
will point it).

Best regards,
Krzysztof

> +					reg = <0x4 0x8>;
> +				};
> +
>  				cpu_speed_grade: speed-grade@10 {
>  					reg = <0x10 4>;
>  				};

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