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Message-ID: <87h7pfn4u3.fsf@nanos.tec.linutronix.de>
Date:   Mon, 23 Nov 2020 22:25:24 +0100
From:   Thomas Gleixner <tglx@...utronix.de>
To:     Andy Lutomirski <luto@...nel.org>,
        Peter Zijlstra <peterz@...radead.org>
Cc:     Linus Torvalds <torvalds@...ux-foundation.org>,
        Mel Gorman <mgorman@...e.de>,
        LKML <linux-kernel@...r.kernel.org>,
        the arch/x86 maintainers <x86@...nel.org>,
        Christoph Hellwig <hch@....de>,
        Matthew Wilcox <willy@...radead.org>,
        Daniel Vetter <daniel@...ll.ch>,
        Andrew Morton <akpm@...ux-foundation.org>,
        Linux-MM <linux-mm@...ck.org>, Ingo Molnar <mingo@...nel.org>,
        Juri Lelli <juri.lelli@...hat.com>,
        Vincent Guittot <vincent.guittot@...aro.org>,
        Dietmar Eggemann <dietmar.eggemann@....com>,
        Steven Rostedt <rostedt@...dmis.org>,
        Ben Segall <bsegall@...gle.com>,
        Daniel Bristot de Oliveira <bristot@...hat.com>
Subject: Re: [patch V4 4/8] sched: Make migrate_disable/enable() independent of RT

On Mon, Nov 23 2020 at 22:15, Thomas Gleixner wrote:
> On Sun, Nov 22 2020 at 15:16, Andy Lutomirski wrote:
>> On Fri, Nov 20, 2020 at 1:29 AM Peter Zijlstra <peterz@...radead.org> wrote:
>> The common case of a CPU switching back and forth between a small
>> number of mms would have no significant overhead.
>
> For CPUs which do not support PCID this sucks, which is everything pre
> Westmere and all of 32bit. Yes, 32bit. If we go there then 32bit has to
> bite the bullet and use the very same mechanism. Not that I care much
> TBH.

Bah, I completely forgot that AMD does not support PCID before Zen3
which is a major showstopper.

Thanks,

        tglx

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