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Message-ID: <CACRpkdZA2od6NfNczeVh4v1D4_UBHrErQLHjyGRXWOVPh9f8hQ@mail.gmail.com>
Date:   Tue, 24 Nov 2020 09:27:07 +0100
From:   Linus Walleij <linus.walleij@...aro.org>
To:     Douglas Anderson <dianders@...omium.org>
Cc:     Marc Zyngier <maz@...nel.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Jason Cooper <jason@...edaemon.net>,
        Maulik Shah <mkshah@...eaurora.org>,
        Srinivas Ramana <sramana@...eaurora.org>,
        Neeraj Upadhyay <neeraju@...eaurora.org>,
        Rajendra Nayak <rnayak@...eaurora.org>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
        MSM <linux-arm-msm@...r.kernel.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        Stephen Boyd <swboyd@...omium.org>,
        Andy Gross <agross@...nel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 3/3] pinctrl: qcom: Clear possible pending irq when
 remuxing GPIOs

On Tue, Nov 24, 2020 at 1:02 AM Douglas Anderson <dianders@...omium.org> wrote:

> Conceptually, we can envision the input on Qualcomm SoCs to pass
> through a bunch of blocks between coming into the chip and becoming a
> GPIO interrupt.

This looks like really good detective engineering, something
I do myself from time to time.

Bjorn does this look OK to you?

I'm wondering about patch 1/3, does it need to be applied
with the rest?

Yours,
Linus Walleij

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