linux-kernel - Re: [PATCH] soundwire: SDCA: detect sdca

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Date:   Tue, 24 Nov 2020 14:09:44 +0530
From:   Vinod Koul <vkoul@...nel.org>
To:     Bard Liao <yung-chuan.liao@...ux.intel.com>
Cc:     alsa-devel@...a-project.org, linux-kernel@...r.kernel.org,
        gregkh@...uxfoundation.org, jank@...ence.com,
        srinivas.kandagatla@...aro.org, hui.wang@...onical.com,
        pierre-louis.bossart@...ux.intel.com, sanyog.r.kale@...el.com,
        mengdong.lin@...el.com, bard.liao@...el.com
Subject: Re: [PATCH] soundwire: SDCA: detect sdca_cascade interrupt

On 04-11-20, 23:23, Bard Liao wrote:
> From: Pierre-Louis Bossart <pierre-louis.bossart@...ux.intel.com>
> 
> The SoundWire 1.2 specification defines an "SDCA cascade" bit which
> handles a logical OR of all SDCA interrupt sources (up to 30 defined).
> 
> Due to limitations of the addressing space, this bit is located in the
> SDW_DP0_INT register when DP0 is used, or alternatively in the
> DP0_SDCA_Support_INTSTAT register when DP0 is not used.
> 
> To allow for both cases to be handled, this bit will be checked in the
> main device-level interrupt handling code. This will result in the
> register being read twice if DP0 is enabled, but it's not clear how to
> optimize this case. It's also more logical to deal with this interrupt
> at the device than the port level, this bit is really not DP0 specific
> and its location in the DP0_INTSTAT bit is only due to the lack of
> free space in SCP_INTSTAT_1.
> 
> The SDCA_Cascade bit cannot be masked or cleared, so the interrupt
> handling only forwards the detection to the Slave driver, which will
> deal with reading the relevant SDCA status bits and clearing them. The
> bus driver only signals the detection.
> 
> The communication with the Slave driver is based on the same interrupt
> callback, with only an extension to provide the status of the
> sdca_cascade bit.

Applied, thanks

-- 
~Vinod