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Message-ID: <160627045053.2717324.16519747693186632490@swboyd.mtv.corp.google.com>
Date: Tue, 24 Nov 2020 18:14:10 -0800
From: Stephen Boyd <sboyd@...nel.org>
To: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
mturquette@...libre.com, robh+dt@...nel.org
Cc: bjorn.andersson@...aro.org, vkoul@...nel.org,
linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Subject: Re: [PATCH v3 1/4] dt-bindings: clock: Add SDX55 GCC clock bindings
Quoting Manivannan Sadhasivam (2020-11-18 23:27:11)
> diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sdx55.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sdx55.yaml
> new file mode 100644
> index 000000000000..9d8981817ae3
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sdx55.yaml
> @@ -0,0 +1,73 @@
[...]
> +
> +properties:
> + compatible:
> + const: qcom,gcc-sdx55
> +
> + clocks:
> + items:
[...]
> + - description: PLL test clock source
> +
> + clock-names:
> + items:
[...]
> + - const: core_bi_pll_test_se
Is it optional? As far as I know this clk has never been implemented
because it's a hardware validation thing and not used otherwise.
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