[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20201125213720.15692-2-kan.liang@linux.intel.com>
Date: Wed, 25 Nov 2020 13:37:20 -0800
From: kan.liang@...ux.intel.com
To: peterz@...radead.org, mingo@...nel.org,
linux-kernel@...r.kernel.org
Cc: eranian@...gle.com, ak@...ux.intel.com,
Kan Liang <kan.liang@...ux.intel.com>, stable@...r.kernel.org
Subject: [PATCH 2/2] perf/x86/intel/lbr: Fix the return type of get_lbr_cycles()
From: Kan Liang <kan.liang@...ux.intel.com>
The cycle count of a timed LBR is always 1 in perf record -D.
The cycle count is stored in the first 16 bits of the IA32_LBR_x_INFO
register, but the get_lbr_cycles() return Boolean type.
Use u16 to replace the Boolean type.
Fixes: 47125db27e47 ("perf/x86/intel/lbr: Support Architectural LBR")
Reported-by: Stephane Eranian <eranian@...gle.com>
Signed-off-by: Kan Liang <kan.liang@...ux.intel.com>
Cc: stable@...r.kernel.org
---
arch/x86/events/intel/lbr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/events/intel/lbr.c b/arch/x86/events/intel/lbr.c
index 1aadb253d296..21890dacfcfe 100644
--- a/arch/x86/events/intel/lbr.c
+++ b/arch/x86/events/intel/lbr.c
@@ -919,7 +919,7 @@ static __always_inline bool get_lbr_predicted(u64 info)
return !(info & LBR_INFO_MISPRED);
}
-static __always_inline bool get_lbr_cycles(u64 info)
+static __always_inline u16 get_lbr_cycles(u64 info)
{
if (static_cpu_has(X86_FEATURE_ARCH_LBR) &&
!(x86_pmu.lbr_timed_lbr && info & LBR_INFO_CYC_CNT_VALID))
--
2.17.1
Powered by blists - more mailing lists