lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Date:   Wed, 25 Nov 2020 14:23:19 -0800
From:   Atish Patra <atishp@...shpatra.org>
To:     Palmer Dabbelt <palmer@...belt.com>
Cc:     linux-riscv <linux-riscv@...ts.infradead.org>,
        Albert Ou <aou@...s.berkeley.edu>,
        Daniel Lezcano <daniel.lezcano@...aro.org>,
        Anup Patel <Anup.Patel@....com>,
        "linux-kernel@...r.kernel.org List" <linux-kernel@...r.kernel.org>,
        Atish Patra <Atish.Patra@....com>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Palmer Dabbelt <palmerdabbelt@...gle.com>,
        kernel-team@...roid.com, kernel test robot <lkp@...el.com>
Subject: Re: [PATCH] RISC-V: Define get_cycles64() regardless of M-mode

On Wed, Nov 25, 2020 at 11:58 AM Palmer Dabbelt <palmer@...belt.com> wrote:
>
> From: Palmer Dabbelt <palmerdabbelt@...gle.com>
>
> The timer driver uses get_cycles64() unconditionally to obtain the current
> time.  A recent refactoring lost the common definition for some configs, which
> is now the only one we need.
>
> Fixes: d5be89a8d118 ("RISC-V: Resurrect the MMIO timer implementation for M-mode systems")
> Reported-by: kernel test robot <lkp@...el.com>
> Signed-off-by: Palmer Dabbelt <palmerdabbelt@...gle.com>
> ---
>  arch/riscv/include/asm/timex.h | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/riscv/include/asm/timex.h b/arch/riscv/include/asm/timex.h
> index ab104905d4db..81de51e6aa32 100644
> --- a/arch/riscv/include/asm/timex.h
> +++ b/arch/riscv/include/asm/timex.h
> @@ -60,6 +60,8 @@ static inline u32 get_cycles_hi(void)
>  }
>  #define get_cycles_hi get_cycles_hi
>
> +#endif /* !CONFIG_RISCV_M_MODE */
> +
>  #ifdef CONFIG_64BIT
>  static inline u64 get_cycles64(void)
>  {
> @@ -79,8 +81,6 @@ static inline u64 get_cycles64(void)
>  }
>  #endif /* CONFIG_64BIT */
>
> -#endif /* !CONFIG_RISCV_M_MODE */
> -
>  #define ARCH_HAS_READ_CURRENT_TIMER
>  static inline int read_current_timer(unsigned long *timer_val)
>  {
> --
> 2.29.2.454.gaff20da3a2-goog
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@...ts.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv


Reviewed-by: Atish Patra <atish.patra@....com>
-- 
Regards,
Atish

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ