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Message-ID: <1606266655.11864.7.camel@mhfsdcap03>
Date: Wed, 25 Nov 2020 09:10:55 +0800
From: Wenbin Mei <wenbin.mei@...iatek.com>
To: Ulf Hansson <ulf.hansson@...aro.org>
CC: Chaotian Jing <chaotian.jing@...iatek.com>,
Matthias Brugger <matthias.bgg@...il.com>,
"linux-mmc@...r.kernel.org" <linux-mmc@...r.kernel.org>,
Linux ARM <linux-arm-kernel@...ts.infradead.org>,
"moderated list:ARM/Mediatek SoC support"
<linux-mediatek@...ts.infradead.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
srv_heupstream <srv_heupstream@...iatek.com>
Subject: Re: [PATCH] mmc: mediatek: Add system suspend/resume interface
On Mon, 2020-11-23 at 17:06 +0100, Ulf Hansson wrote:
> On Wed, 18 Nov 2020 at 07:34, Wenbin Mei <wenbin.mei@...iatek.com> wrote:
> >
> > Before we got these errors on MT8192 platform:
> > [ 59.153891] Restarting tasks ...
> > [ 59.154540] done.
> > [ 59.159175] PM: suspend exit
> > [ 59.218724] mtk-msdc 11f60000.mmc: phase: [map:fffffffe] [maxlen:31]
> > [final:16]
> > [ 119.776083] mmc0: cqhci: timeout for tag 9
> > [ 119.780196] mmc0: cqhci: ============ CQHCI REGISTER DUMP ===========
> > [ 119.786709] mmc0: cqhci: Caps: 0x100020b6 | Version: 0x00000510
> > [ 119.793225] mmc0: cqhci: Config: 0x00000101 | Control: 0x00000000
> > [ 119.799706] mmc0: cqhci: Int stat: 0x00000000 | Int enab: 0x00000000
> > [ 119.806177] mmc0: cqhci: Int sig: 0x00000000 | Int Coal: 0x00000000
> > [ 119.812670] mmc0: cqhci: TDL base: 0x00000000 | TDL up32: 0x00000000
> > [ 119.819149] mmc0: cqhci: Doorbell: 0x003ffc00 | TCN: 0x00000200
> > [ 119.825656] mmc0: cqhci: Dev queue: 0x00000000 | Dev Pend: 0x00000000
> > [ 119.832155] mmc0: cqhci: Task clr: 0x00000000 | SSC1: 0x00001000
> > [ 119.838627] mmc0: cqhci: SSC2: 0x00000000 | DCMD rsp: 0x00000000
> > [ 119.845174] mmc0: cqhci: RED mask: 0xfdf9a080 | TERRI: 0x0000891c
> > [ 119.851654] mmc0: cqhci: Resp idx: 0x00000000 | Resp arg: 0x00000000
> > [ 119.865773] mmc0: cqhci: : ===========================================
> > [ 119.872358] mmc0: running CQE recovery
> > From these logs, we found TDL base was back to the default value.
> >
> > After suspend, the mmc host is powered off by HW, and bring CQE register
> > to the default value, so we add system suspend/resume interface, then bring
> > CQE to deactivated state before suspend, it will be enabled by CQE first
> > request after resume.
> >
> > Signed-off-by: Wenbin Mei <wenbin.mei@...iatek.com>
>
> I took the liberty of renaming msdc_sys_suspend|resume to
> msdc_suspend|resume, as I think the "_sys" is a bit superfluous.
>
> Additionally, I added a fixes+stable tag, then I applied this for fixes, thanks!
>
> Please tell me, if there is anything you would like me to change.
>
> Kind regards
> Uffe
>
> It is OK for me, thanks for your help.
> > ---
> > drivers/mmc/host/mtk-sd.c | 22 ++++++++++++++++++++--
> > 1 file changed, 20 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c
> > index fc5ee5df91ad..c5f9cd6fc951 100644
> > --- a/drivers/mmc/host/mtk-sd.c
> > +++ b/drivers/mmc/host/mtk-sd.c
> > @@ -2758,11 +2758,29 @@ static int msdc_runtime_resume(struct device *dev)
> > msdc_restore_reg(host);
> > return 0;
> > }
> > +
> > +static int msdc_sys_suspend(struct device *dev)
> > +{
> > + struct mmc_host *mmc = dev_get_drvdata(dev);
> > + int ret;
> > +
> > + if (mmc->caps2 & MMC_CAP2_CQE) {
> > + ret = cqhci_suspend(mmc);
> > + if (ret)
> > + return ret;
> > + }
> > +
> > + return pm_runtime_force_suspend(dev);
> > +}
> > +
> > +static int msdc_sys_resume(struct device *dev)
> > +{
> > + return pm_runtime_force_resume(dev);
> > +}
> > #endif
> >
> > static const struct dev_pm_ops msdc_dev_pm_ops = {
> > - SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
> > - pm_runtime_force_resume)
> > + SET_SYSTEM_SLEEP_PM_OPS(msdc_sys_suspend, msdc_sys_resume)
> > SET_RUNTIME_PM_OPS(msdc_runtime_suspend, msdc_runtime_resume, NULL)
> > };
> >
> > --
> > 2.18.0
> >
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