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Message-ID: <20201127185522.GB1092947@xps15>
Date: Fri, 27 Nov 2020 11:55:22 -0700
From: Mathieu Poirier <mathieu.poirier@...aro.org>
To: Suzuki K Poulose <suzuki.poulose@....com>
Cc: linux-arm-kernel@...ts.infradead.org, mike.leach@...aro.org,
linux-kernel@...r.kernel.org, anshuman.khandual@....com,
jonathan.zhouwen@...wei.com, coresight@...ts.linaro.org,
Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org>,
Tingwei Zhang <tingwei@...eaurora.org>
Subject: Re: [PATCH v4 02/25] coresight: etm4x: Skip accessing TRCPDCR in
save/restore
On Thu, Nov 19, 2020 at 04:45:24PM +0000, Suzuki K Poulose wrote:
> When the ETM is affected by Qualcomm errata, modifying the
> TRCPDCR could cause the system hang. Even though this is
> taken care of during enable/disable ETM, the ETM state
> save/restore could still access the TRCPDCR. Make sure
> we skip the access during the save/restore.
>
> Found by code inspection.
>
> Fixes: commit 02510a5aa78df45 ("coresight: etm4x: Add support to skip trace unit power up")
https://elixir.bootlin.com/linux/v5.10-rc5/source/Documentation/process/submitting-patches.rst#L121
> Cc: Mathieu Poirier <mathieu.poirier@...aro.org>
> Cc: Mike Leach <mike.leach@...aro.org>
> Cc: Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org>
> Cc: Tingwei Zhang <tingwei@...eaurora.org>
> Signed-off-by: Suzuki K Poulose <suzuki.poulose@....com>
> ---
> drivers/hwtracing/coresight/coresight-etm4x-core.c | 12 +++++++-----
> 1 file changed, 7 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c
> index 59a4a166adf4..ea2e317ddb7d 100644
> --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c
> +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c
> @@ -1277,7 +1277,8 @@ static int etm4_cpu_save(struct etmv4_drvdata *drvdata)
>
> state->trcclaimset = readl(drvdata->base + TRCCLAIMCLR);
>
> - state->trcpdcr = readl(drvdata->base + TRCPDCR);
> + if (!drvdata->skip_power_up)
> + state->trcpdcr = readl(drvdata->base + TRCPDCR);
>
> /* wait for TRCSTATR.IDLE to go up */
> if (coresight_timeout(drvdata->base, TRCSTATR, TRCSTATR_IDLE_BIT, 1)) {
> @@ -1295,9 +1296,9 @@ static int etm4_cpu_save(struct etmv4_drvdata *drvdata)
> * potentially save power on systems that respect the TRCPDCR_PU
> * despite requesting software to save/restore state.
> */
> - writel_relaxed((state->trcpdcr & ~TRCPDCR_PU),
> - drvdata->base + TRCPDCR);
> -
> + if (!drvdata->skip_power_up)
> + writel_relaxed((state->trcpdcr & ~TRCPDCR_PU),
> + drvdata->base + TRCPDCR);
> out:
> CS_LOCK(drvdata->base);
> return ret;
> @@ -1392,7 +1393,8 @@ static void etm4_cpu_restore(struct etmv4_drvdata *drvdata)
>
> writel_relaxed(state->trcclaimset, drvdata->base + TRCCLAIMSET);
>
> - writel_relaxed(state->trcpdcr, drvdata->base + TRCPDCR);
> + if (!drvdata->skip_power_up)
> + writel_relaxed(state->trcpdcr, drvdata->base + TRCPDCR);
>
> drvdata->state_needs_restore = false;
>
> --
> 2.24.1
>
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