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Date:   Fri, 27 Nov 2020 14:54:23 +0900
From:   Masami Hiramatsu <mhiramat@...nel.org>
To:     Borislav Petkov <bp@...en8.de>
Cc:     Andy Lutomirski <luto@...capital.net>, X86 ML <x86@...nel.org>,
        LKML <linux-kernel@...r.kernel.org>
Subject: Re: [RFC PATCH v0 03/19] x86/insn: Add an insn_decode() API

On Thu, 26 Nov 2020 18:50:11 +0100
Borislav Petkov <bp@...en8.de> wrote:

> On Thu, Nov 26, 2020 at 10:37:09AM +0900, Masami Hiramatsu wrote:
> > BTW, the instruction validation depends on who needs it, because to
> > check the all invalid ops, we need more information in the x86-opcode-map.txt
> > and it will bloat up the table size and consumes more time to analysis.
> 
> Yes, the decoder is supposed to serve the kernel's needs, not be a
> general purpose one.
> 
> > (Moreover, it depends on the processor generation -- older processor will
> > not support VEX prefix, those are invalid)
> 
> Why does the processor VEX support matter? Isn't the decoder supposed to
> decode any instruction it knows about, regardless of the CPU it runs on?

Hm, you meant the "invalid" means "that can not be decoded" ?
Then it is OK. I Thought "invalid" means "the processor can not execute
(some exception will occur)".

> 
> > OK, then could you use -1 instead of 1? It may allow us to expand it
> > to return error code in the future.
> 
> Ok, sure.

Thanks!

> 
> > I think insn_get_prefixes() can be used independently, because x86
> > perfix bytes is very complex.
> 
> Yah, it all depends on what API interfaces we want to give to users and
> make those other helpers internal. Time and usecases will tell.
> 
> Thx.
> 
> -- 
> Regards/Gruss,
>     Boris.
> 
> https://people.kernel.org/tglx/notes-about-netiquette


-- 
Masami Hiramatsu <mhiramat@...nel.org>

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