linux-kernel - Re: [PATCH v2 3/3] mtd: spi-nor: spansion: Set ECC block size

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Message-ID: <ecff64ce-7170-0ca4-b10b-aa9f99f4bd46@microchip.com>
Date:   Sat, 28 Nov 2020 11:00:38 +0000
From:   <Tudor.Ambarus@...rochip.com>
To:     <p.yadav@...com>, <miquel.raynal@...tlin.com>, <richard@....at>,
        <vigneshr@...com>, <linux-mtd@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 3/3] mtd: spi-nor: spansion: Set ECC block size

On 11/18/20 8:24 PM, Pratyush Yadav wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> The S28 flash family uses 2-bit ECC by default with each ECC block being
> 16 bytes. Under this scheme multi-pass programming to an ECC block is
> not allowed. Set the writesize to make sure multi-pass programming is
> not attempted on the flash.
> 
> Signed-off-by: Pratyush Yadav <p.yadav@...com>

Reviewed-by: Tudor Ambarus <tudor.ambarus@...rochip.com>

> ---
> 
> Notes:
>     New in v2.
> 
>  drivers/mtd/spi-nor/spansion.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c
> index e487fd341a56..b0c5521c1e27 100644
> --- a/drivers/mtd/spi-nor/spansion.c
> +++ b/drivers/mtd/spi-nor/spansion.c
> @@ -109,6 +109,7 @@ static int spi_nor_cypress_octal_dtr_enable(struct spi_nor *nor, bool enable)
>  static void s28hs512t_default_init(struct spi_nor *nor)
>  {
>         nor->params->octal_dtr_enable = spi_nor_cypress_octal_dtr_enable;
> +       nor->params->writesize = 16;
>  }
> 
>  static void s28hs512t_post_sfdp_fixup(struct spi_nor *nor)
> --
> 2.28.0
>