linux-kernel - Re: [RESEND PATCH 05/19] dmaengine: sun6i: Add support for A100 DMA

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Date:   Sat, 28 Nov 2020 20:31:52 +0000
From:   André Przywara <andre.przywara@....com>
To:     Frank Lee <frank@...winnertech.com>, tiny.windzz@...il.com
Cc:     linux-kernel@...r.kernel.org, Maxime Ripard <mripard@...nel.org>,
        Vinod Koul <vkoul@...nel.org>, dmaengine@...r.kernel.org,
        Dan Williams <dan.j.williams@...el.com>,
        Chen-Yu Tsai <wens@...e.org>,
        linux-arm-kernel@...ts.infradead.org,
        Jernej Skrabec <jernej.skrabec@...l.net>
Subject: Re: [RESEND PATCH 05/19] dmaengine: sun6i: Add support for A100 DMA

On 10/11/2020 06:28, Frank Lee wrote:

Hi,

> From: Yangtao Li <frank@...winnertech.com>
> 
> The dma of a100 is similar to h6, with some minor changes to
> support greater addressing capabilities.

So apparently those changes are backwards compatible, right?
Why do we need then a new struct now, when this is actually identical to
the existing H6 one?

So as this seems to work with the same settings as the H6, I think we
don't need any change in the driver at the moment, just using the H6
compatible as a fallback in the .dtsi.

Cheers,
Andre

P.S. I understand that Vinod already applied it, and it doesn't hurt to
have that in at the moment, if we fix the compatible usage.

> 
> Add support for it.>
> Signed-off-by: Yangtao Li <frank@...winnertech.com>
> ---
>  drivers/dma/sun6i-dma.c | 25 +++++++++++++++++++++++++
>  1 file changed, 25 insertions(+)
> 
> diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c
> index f5f9c86c50bc..5cadd4d2b824 100644
> --- a/drivers/dma/sun6i-dma.c
> +++ b/drivers/dma/sun6i-dma.c
> @@ -1173,6 +1173,30 @@ static struct sun6i_dma_config sun50i_a64_dma_cfg = {
>  			     BIT(DMA_SLAVE_BUSWIDTH_8_BYTES),
>  };
>  
> +/*
> + * TODO: Add support for more than 4g physical addressing.
> + *
> + * The A100 binding uses the number of dma channels from the
> + * device tree node.
> + */
> +static struct sun6i_dma_config sun50i_a100_dma_cfg = {
> +	.clock_autogate_enable = sun6i_enable_clock_autogate_h3,
> +	.set_burst_length = sun6i_set_burst_length_h3,
> +	.set_drq          = sun6i_set_drq_h6,
> +	.set_mode         = sun6i_set_mode_h6,
> +	.src_burst_lengths = BIT(1) | BIT(4) | BIT(8) | BIT(16),
> +	.dst_burst_lengths = BIT(1) | BIT(4) | BIT(8) | BIT(16),
> +	.src_addr_widths   = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) |
> +			     BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
> +			     BIT(DMA_SLAVE_BUSWIDTH_4_BYTES) |
> +			     BIT(DMA_SLAVE_BUSWIDTH_8_BYTES),
> +	.dst_addr_widths   = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) |
> +			     BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
> +			     BIT(DMA_SLAVE_BUSWIDTH_4_BYTES) |
> +			     BIT(DMA_SLAVE_BUSWIDTH_8_BYTES),
> +	.has_mbus_clk = true,
> +};
> +
>  /*
>   * The H6 binding uses the number of dma channels from the
>   * device tree node.
> @@ -1225,6 +1249,7 @@ static const struct of_device_id sun6i_dma_match[] = {
>  	{ .compatible = "allwinner,sun8i-h3-dma", .data = &sun8i_h3_dma_cfg },
>  	{ .compatible = "allwinner,sun8i-v3s-dma", .data = &sun8i_v3s_dma_cfg },
>  	{ .compatible = "allwinner,sun50i-a64-dma", .data = &sun50i_a64_dma_cfg },
> +	{ .compatible = "allwinner,sun50i-a100-dma", .data = &sun50i_a100_dma_cfg },
>  	{ .compatible = "allwinner,sun50i-h6-dma", .data = &sun50i_h6_dma_cfg },
>  	{ /* sentinel */ }
>  };
>