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Date: Mon, 30 Nov 2020 13:31:21 -0700
From: Rob Herring <robh+dt@...nel.org>
To: Kevin Tang <kevin3.tang@...il.com>
Cc: Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
Maxime Ripard <mripard@...nel.org>,
Sean Paul <sean@...rly.run>, David Airlie <airlied@...ux.ie>,
Daniel Vetter <daniel@...ll.ch>,
Mark Rutland <mark.rutland@....com>,
Orson Zhai <orsonzhai@...il.com>,
Lyra Zhang <zhang.lyra@...il.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
dri-devel <dri-devel@...ts.freedesktop.org>
Subject: Re: [PATCH 5/6] dt-bindings: display: add Unisoc's mipi dsi&dphy bindings
On Mon, Nov 30, 2020 at 7:29 AM Kevin Tang <kevin3.tang@...il.com> wrote:
>
> From: Kevin Tang <kevin.tang@...soc.com>
>
> Adds MIPI DSI Master and MIPI DSI-PHY (D-PHY)
> support for Unisoc's display subsystem.
>
> Cc: Orson Zhai <orsonzhai@...il.com>
> Cc: Chunyan Zhang <zhang.lyra@...il.com>
> Signed-off-by: Kevin Tang <kevin.tang@...soc.com>
> ---
> .../display/sprd/sprd,sharkl3-dsi-host.yaml | 107 +++++++++++++++++++++
> .../display/sprd/sprd,sharkl3-dsi-phy.yaml | 84 ++++++++++++++++
> 2 files changed, 191 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/display/sprd/sprd,sharkl3-dsi-host.yaml
> create mode 100644 Documentation/devicetree/bindings/display/sprd/sprd,sharkl3-dsi-phy.yaml
>
> diff --git a/Documentation/devicetree/bindings/display/sprd/sprd,sharkl3-dsi-host.yaml b/Documentation/devicetree/bindings/display/sprd/sprd,sharkl3-dsi-host.yaml
> new file mode 100644
> index 0000000..fe0e89d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/sprd/sprd,sharkl3-dsi-host.yaml
> @@ -0,0 +1,107 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/sprd/sprd,sharkl3-dsi-host.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Unisoc MIPI DSI Controller
> +
> +maintainers:
> + - Kevin Tang <kevin.tang@...soc.com>
> +
> +properties:
> + compatible:
> + const: sprd,sharkl3-dsi-host
> +
> + reg:
> + maxItems: 1
> + description:
> + Physical base address and length of the registers set for the device.
> +
> + interrupts:
> + maxItems: 2
> + description:
> + Should contain DSI interrupt.
> +
> + clocks:
> + minItems: 1
> +
> + clock-names:
> + items:
> + - const: clk_src_96m
> +
> + power-domains:
> + maxItems: 1
> + description: A phandle to DSIM power domain node
> +
> + ports:
> + type: object
> +
> + properties:
> + "#address-cells":
> + const: 1
> +
> + "#size-cells":
> + const: 0
> +
> + port@0:
> + type: object
> + description:
> + A port node with endpoint definitions as defined in
> + Documentation/devicetree/bindings/media/video-interfaces.txt.
> + That port should be the input endpoint, usually coming from
> + the associated DPU.
> + port@1:
> + type: object
> + description:
> + A port node with endpoint definitions as defined in
> + Documentation/devicetree/bindings/media/video-interfaces.txt.
> + That port should be the output endpoint, usually output to
> + the associated DPHY.
> +
> + required:
> + - "#address-cells"
> + - "#size-cells"
> + - port@0
> + - port@1
> +
> + additionalProperties: false
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - clocks
> + - clock-names
> + - ports
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/clock/sprd,sc9860-clk.h>
> + dsi: dsi@...00000 {
> + compatible = "sprd,sharkl3-dsi-host";
> + reg = <0x63100000 0x1000>;
> + interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
> + clock-names = "clk_src_96m";
> + clocks = <&pll CLK_TWPLL_96M>;
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + port@0 {
> + reg = <0>;
> + dsi_in: endpoint {
> + remote-endpoint = <&dpu_out>;
> + };
> + };
> + port@1 {
> + reg = <1>;
> + dsi_out: endpoint {
> + remote-endpoint = <&dphy_in>;
> + };
> + };
> + };
> + };
> diff --git a/Documentation/devicetree/bindings/display/sprd/sprd,sharkl3-dsi-phy.yaml b/Documentation/devicetree/bindings/display/sprd/sprd,sharkl3-dsi-phy.yaml
> new file mode 100644
> index 0000000..b4715d5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/sprd/sprd,sharkl3-dsi-phy.yaml
> @@ -0,0 +1,84 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/sprd/sprd,sharkl3-dsi-phy.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Unisoc MIPI DSI-PHY (D-PHY)
> +
> +maintainers:
> + - Kevin Tang <kevin.tang@...soc.com>
> +
> +properties:
> + compatible:
> + const: sprd,sharkl3-dsi-phy
> +
> + reg:
> + maxItems: 1
> + description:
> + Must be the dsi controller base address.
> +
> + ports:
> + type: object
> +
> + properties:
> + "#address-cells":
> + const: 1
> +
> + "#size-cells":
> + const: 0
> +
> + port@0:
> + type: object
> + description:
> + A port node with endpoint definitions as defined in
> + Documentation/devicetree/bindings/media/video-interfaces.txt.
> + That port should be the output endpoint, usually output to
> + the associated panel.
> + port@1:
For PHYs, we use the PHY binding, not the graph binding. Please follow
what practically every other DSI PHY does.
Rob
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