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Date: Mon, 30 Nov 2020 11:02:41 +0000 From: Srinivas Kandagatla <srinivas.kandagatla@...aro.org> To: Srinivasa Rao Mandadapu <srivasam@...eaurora.org>, agross@...nel.org, bjorn.andersson@...aro.org, robh+dt@...nel.org, linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, rohitkr@...eaurora.org Cc: V Sujith Kumar Reddy <vsujithk@...eaurora.org> Subject: Re: [PATCH v3 1/2] arm64: dts: qcom: sc7180: Update lpass cpu node for audio over dp On 30/09/2020 07:42, Srinivasa Rao Mandadapu wrote: > From: V Sujith Kumar Reddy <vsujithk@...eaurora.org> > > Updaate lpass dts node with HDMI reg, interrupt and iommu > for supporting audio over dp. > > Signed-off-by: Srinivasa Rao Mandadapu <srivasam@...eaurora.org> > Signed-off-by: V Sujith Kumar Reddy <vsujithk@...eaurora.org> Reviewed-by: Srinivas Kandagatla <srinivas.kandagatla@...aro.org> > --- > arch/arm64/boot/dts/qcom/sc7180.dtsi | 17 ++++++++++------- > 1 file changed, 10 insertions(+), 7 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi > index 427a4bf..802ea0a 100644 > --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi > @@ -21,6 +21,7 @@ > #include <dt-bindings/reset/qcom,sdm845-pdc.h> > #include <dt-bindings/soc/qcom,rpmh-rsc.h> > #include <dt-bindings/thermal/thermal.h> > +#include <dt-bindings/sound/sc7180-lpass.h> > > / { > interrupt-parent = <&intc>; > @@ -3428,16 +3429,18 @@ > #power-domain-cells = <1>; > }; > > - lpass_cpu: lpass@...00000 { > + lpass_cpu: lpass@...87000 { > compatible = "qcom,sc7180-lpass-cpu"; > > - reg = <0 0x62f00000 0 0x29000>; > - reg-names = "lpass-lpaif"; > + reg = <0 0x62d87000 0 0x68000>, <0 0x62f00000 0 0x29000>; > + reg-names = "lpass-hdmiif", "lpass-lpaif"; > > - iommus = <&apps_smmu 0x1020 0>; > + iommus = <&apps_smmu 0x1020 0>, <&apps_smmu 0x1032 0>; > > power-domains = <&lpass_hm LPASS_CORE_HM_GDSCR>; > > + status = "disabled"; > + > clocks = <&gcc GCC_LPASS_CFG_NOC_SWAY_CLK>, > <&lpasscc LPASS_AUDIO_CORE_CORE_CLK>, > <&lpasscc LPASS_AUDIO_CORE_EXT_MCLK0_CLK>, > @@ -3449,13 +3452,13 @@ > "mclk0", "pcnoc-mport-clk", > "mi2s-bit-clk0", "mi2s-bit-clk1"; > > - > #sound-dai-cells = <1>; > #address-cells = <1>; > #size-cells = <0>; > > - interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>; > - interrupt-names = "lpass-irq-lpaif"; > + interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "lpass-irq-lpaif", "lpass-irq-hdmi"; > }; > > lpass_hm: clock-controller@...00000 { >
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