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Message-ID: <CAK8P3a1GpMb5uQnrorvd360MNKhQCjR0zO4vfYTzqBN8P8qpuA@mail.gmail.com>
Date:   Mon, 30 Nov 2020 17:03:58 +0100
From:   Arnd Bergmann <arnd@...nel.org>
To:     Daniel Palmer <daniel@...f.com>
Cc:     DTML <devicetree@...r.kernel.org>,
        Linux ARM <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Arnd Bergmann <arnd@...db.de>, Rob Herring <robh@...nel.org>,
        Willy Tarreau <w@....eu>
Subject: Re: [PATCH 9/9] ARM: mstar: SMP support

On Mon, Nov 30, 2020 at 3:25 PM Daniel Palmer <daniel@...f.com> wrote:
>
> Hi Arnd,
>
> On Mon, 30 Nov 2020 at 22:42, Arnd Bergmann <arnd@...nel.org> wrote:
> > > +struct smp_operations __initdata mstarv7_smp_ops  = {
> > > +       .smp_boot_secondary = mstarv7_boot_secondary,
> > > +};
> > > +#endif
> >
> > So no hotplug operations?
>
> Not yet. There are controls to power down different bits of the chip,
> assert internal resets and so on so it might be possible to add that
> later but I haven't worked out where those bits are yet for the second
> cpu.
>
> > Or better, use CPU_METHOD_OF_DECLARE() instead of smp_ops.
>
> I'll do that for the v2.

Ok.

> Was there anything else that looked fishy? Every other platform seems
> to have a lot of code for moving secondary CPUs from the boot ROM into
> somewhere the kernel can control the order in which they come online
> (vendor code has a copy/paste of the vexpress code) so I was worried I
> missed something.

No, it looks fine to me, but I'm not an expert in this area.

As far as I can tell, platforms will either execute from bootrom with
the secondary_startup function in a register like you have, or
they start from SRAM, with that function somewhere else, but
you wouldn't need both.

           Arnd

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