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Message-ID: <4d089936-65fe-8601-73e7-0424d363b6f2@linaro.org>
Date: Tue, 1 Dec 2020 14:56:46 +0200
From: Georgi Djakov <georgi.djakov@...aro.org>
To: Martin Kepplinger <martin.kepplinger@...i.sm>, robh@...nel.org,
shawnguo@...nel.org, festevam@...il.com, catalin.marinas@....com,
will@...nel.org, cdleonard@...il.com
Cc: kernel@...gutronix.de, linux-imx@....com, kernel@...i.sm,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, linux-pm@...r.kernel.org,
Leonard Crestez <leonard.crestez@....com>
Subject: Re: [PATCH v2 1/7] arm64: dts: imx8m: Add NOC nodes
Hi Martin,
Thank you for sending the patches.
On 1.12.20 14:39, Martin Kepplinger wrote:
> From: Leonard Crestez <leonard.crestez@....com>
>
> Add initial support for dynamic frequency scaling of main NOC.
>
> Make DDRC the parent of the NOC (using passive governor) so that the
> main NOC is automatically scaled together with DDRC by default.
>
> Support for proactive scaling via interconnect will come on top.
>
> Signed-off-by: Leonard Crestez <leonard.crestez@....com>
> Tested-by: Martin Kepplinger <martin.kepplinger@...i.sm> (imx8mq)
As you are sending this, i believe that it should have your signed-off
line (please check Documentation/process/submitting-patches.rst).
Also please give people some time to look into this (at least 1-2 weeks)
before submitting a new version.
Thanks,
Georgi
> ---
> arch/arm64/boot/dts/freescale/imx8mm.dtsi | 22 ++++++++++++++++++++++
> arch/arm64/boot/dts/freescale/imx8mn.dtsi | 22 ++++++++++++++++++++++
> arch/arm64/boot/dts/freescale/imx8mq.dtsi | 22 ++++++++++++++++++++++
> 3 files changed, 66 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> index c824f2615fe8..835b19f0ea42 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> @@ -921,6 +921,28 @@
>
> };
>
> + noc: interconnect@...00000 {
> + compatible = "fsl,imx8mm-noc", "fsl,imx8m-noc";
> + reg = <0x32700000 0x100000>;
> + clocks = <&clk IMX8MM_CLK_NOC>;
> + devfreq = <&ddrc>;
> + operating-points-v2 = <&noc_opp_table>;
> +
> + noc_opp_table: opp-table {
> + compatible = "operating-points-v2";
> +
> + opp-150M {
> + opp-hz = /bits/ 64 <150000000>;
> + };
> + opp-375M {
> + opp-hz = /bits/ 64 <375000000>;
> + };
> + opp-750M {
> + opp-hz = /bits/ 64 <750000000>;
> + };
> + };
> + };
> +
> aips4: bus@...00000 {
> compatible = "fsl,aips-bus", "simple-bus";
> reg = <0x32c00000 0x400000>;
> diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> index a06d2a6268e6..8e2d413f97d4 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> @@ -772,6 +772,28 @@
>
> };
>
> + noc: interconnect@...00000 {
> + compatible = "fsl,imx8mn-noc", "fsl,imx8m-noc";
> + reg = <0x32700000 0x100000>;
> + clocks = <&clk IMX8MN_CLK_NOC>;
> + devfreq = <&ddrc>;
> + operating-points-v2 = <&noc_opp_table>;
> +
> + noc_opp_table: opp-table {
> + compatible = "operating-points-v2";
> +
> + opp-100M {
> + opp-hz = /bits/ 64 <100000000>;
> + };
> + opp-600M {
> + opp-hz = /bits/ 64 <600000000>;
> + };
> + opp-800M {
> + opp-hz = /bits/ 64 <800000000>;
> + };
> + };
> + };
> +
> aips4: bus@...00000 {
> compatible = "fsl,aips-bus", "simple-bus";
> reg = <0x32c00000 0x400000>;
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> index a841a023e8e0..d139a46ee8ce 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> @@ -1158,6 +1158,28 @@
> };
> };
>
> + noc: interconnect@...00000 {
> + compatible = "fsl,imx8mq-noc", "fsl,imx8m-noc";
> + reg = <0x32700000 0x100000>;
> + clocks = <&clk IMX8MQ_CLK_NOC>;
> + devfreq = <&ddrc>;
> + operating-points-v2 = <&noc_opp_table>;
> +
> + noc_opp_table: opp-table {
> + compatible = "operating-points-v2";
> +
> + opp-133M {
> + opp-hz = /bits/ 64 <133333333>;
> + };
> + opp-400M {
> + opp-hz = /bits/ 64 <400000000>;
> + };
> + opp-800M {
> + opp-hz = /bits/ 64 <800000000>;
> + };
> + };
> + };
> +
> bus@...00000 { /* AIPS4 */
> compatible = "fsl,aips-bus", "simple-bus";
> reg = <0x32c00000 0x400000>;
>
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