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Message-ID: <705fdfec-25a4-60bc-868e-af515c731273@intel.com>
Date:   Tue, 1 Dec 2020 14:26:27 -0800
From:   Dave Hansen <dave.hansen@...el.com>
To:     "Yu, Yu-cheng" <yu-cheng.yu@...el.com>, x86@...nel.org,
        "H. Peter Anvin" <hpa@...or.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>, linux-kernel@...r.kernel.org,
        linux-doc@...r.kernel.org, linux-mm@...ck.org,
        linux-arch@...r.kernel.org, linux-api@...r.kernel.org,
        Arnd Bergmann <arnd@...db.de>,
        Andy Lutomirski <luto@...nel.org>,
        Balbir Singh <bsingharora@...il.com>,
        Borislav Petkov <bp@...en8.de>,
        Cyrill Gorcunov <gorcunov@...il.com>,
        Dave Hansen <dave.hansen@...ux.intel.com>,
        Eugene Syromiatnikov <esyr@...hat.com>,
        Florian Weimer <fweimer@...hat.com>,
        "H.J. Lu" <hjl.tools@...il.com>, Jann Horn <jannh@...gle.com>,
        Jonathan Corbet <corbet@....net>,
        Kees Cook <keescook@...omium.org>,
        Mike Kravetz <mike.kravetz@...cle.com>,
        Nadav Amit <nadav.amit@...il.com>,
        Oleg Nesterov <oleg@...hat.com>, Pavel Machek <pavel@....cz>,
        Peter Zijlstra <peterz@...radead.org>,
        Randy Dunlap <rdunlap@...radead.org>,
        "Ravi V. Shankar" <ravi.v.shankar@...el.com>,
        Vedvyas Shanbhogue <vedvyas.shanbhogue@...el.com>,
        Dave Martin <Dave.Martin@....com>,
        Weijiang Yang <weijiang.yang@...el.com>,
        Pengfei Xu <pengfei.xu@...el.com>
Subject: Re: [PATCH v15 03/26] x86/fpu/xstate: Introduce CET MSR XSAVES
 supervisor states

On 11/30/20 3:16 PM, Yu, Yu-cheng wrote:
>>
>> Do we have any other spots in the kernel where we care about:
>>
>>     boot_cpu_has(X86_FEATURE_SHSTK) ||
>>     boot_cpu_has(X86_FEATURE_IBT)
>>
>> ?  If so, we could also address this by declaring a software-defined
>> X86_FEATURE_CET and then setting it if SHSTK||IBT is supported, then we
>> just put that one feature in xsave_cpuid_features[].
>>
> 
> These features have different CPUIDs but are complementary parts.  I
> don't know if someday there will be shadow-stack-only CPUs, but an
> IBT-only CPU is weird.  What if the kernel checks that the CPU has both
> features and presents only one feature flag (X86_FEATURE_CET), no
> X86_FEATURE_SHSTK or X86_FEATURE_IBT?

Logically, that's probably fine.  But, X86_FEATURE_IBT/SHSTK are in a
non-scattered leaf, so we'll kinda define them whether we like it or
not.  We'd have to go out of our way to *not* define them.

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