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Message-ID: <20201201210315.45a73673@canb.auug.org.au>
Date: Tue, 1 Dec 2020 21:03:15 +1100
From: Stephen Rothwell <sfr@...b.auug.org.au>
To: Geert Uytterhoeven <geert+renesas@...der.be>
Cc: Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Michael Ellerman <mpe@...erman.id.au>,
Benjamin Herrenschmidt <benh@...nel.crashing.org>,
Paul Mackerras <paulus@...ba.org>,
Gareth Williams <gareth.williams.jx@...esas.com>,
linux-renesas-soc@...r.kernel.org, linux-clk@...r.kernel.org,
linuxppc-dev@...ts.ozlabs.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] clk: renesas: r9a06g032: Drop __packed for
portability
Hi Geert,
On Mon, 30 Nov 2020 09:57:43 +0100 Geert Uytterhoeven <geert+renesas@...der.be> wrote:
>
> The R9A06G032 clock driver uses an array of packed structures to reduce
> kernel size. However, this array contains pointers, which are no longer
> aligned naturally, and cannot be relocated on PPC64. Hence when
> compile-testing this driver on PPC64 with CONFIG_RELOCATABLE=y (e.g.
> PowerPC allyesconfig), the following warnings are produced:
>
> WARNING: 136 bad relocations
> c000000000616be3 R_PPC64_UADDR64 .rodata+0x00000000000cf338
> c000000000616bfe R_PPC64_UADDR64 .rodata+0x00000000000cf370
> ...
>
> Fix this by dropping the __packed attribute from the r9a06g032_clkdesc
> definition, trading a small size increase for portability.
>
> This increases the 156-entry clock table by 1 byte per entry, but due to
> the compiler generating more efficient code for unpacked accesses, the
> net size increase is only 76 bytes (gcc 9.3.0 on arm32).
>
> Reported-by: Stephen Rothwell <sfr@...b.auug.org.au>
> Fixes: 4c3d88526eba2143 ("clk: renesas: Renesas R9A06G032 clock driver")
> Signed-off-by: Geert Uytterhoeven <geert+renesas@...der.be>
> ---
> v2:
> - Fix authorship.
> ---
> drivers/clk/renesas/r9a06g032-clocks.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clk/renesas/r9a06g032-clocks.c b/drivers/clk/renesas/r9a06g032-clocks.c
> index d900f6bf53d0b944..892e91b92f2c80f5 100644
> --- a/drivers/clk/renesas/r9a06g032-clocks.c
> +++ b/drivers/clk/renesas/r9a06g032-clocks.c
> @@ -55,7 +55,7 @@ struct r9a06g032_clkdesc {
> u16 sel, g1, r1, g2, r2;
> } dual;
> };
> -} __packed;
> +};
>
> #define I_GATE(_clk, _rst, _rdy, _midle, _scon, _mirack, _mistat) \
> { .gate = _clk, .reset = _rst, \
> --
> 2.25.1
>
Tested-by: Stephen Rothwell <sfr@...b.auug.org.au> # PowerPC allyesconfig build
--
Cheers,
Stephen Rothwell
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