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Message-ID: <20201201102711.8727-4-p.yadav@ti.com>
Date: Tue, 1 Dec 2020 15:57:11 +0530
From: Pratyush Yadav <p.yadav@...com>
To: Tudor Ambarus <tudor.ambarus@...rochip.com>,
Miquel Raynal <miquel.raynal@...tlin.com>,
Richard Weinberger <richard@....at>,
Vignesh Raghavendra <vigneshr@...com>,
<linux-mtd@...ts.infradead.org>, <linux-kernel@...r.kernel.org>
CC: Pratyush Yadav <p.yadav@...com>
Subject: [PATCH v3 3/3] mtd: spi-nor: spansion: Set ECC block size
The S28 flash family uses 2-bit ECC by default with each ECC block being
16 bytes. Under this scheme multi-pass programming to an ECC block is
not allowed. Set the writesize to make sure multi-pass programming is
not attempted on the flash.
Signed-off-by: Pratyush Yadav <p.yadav@...com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@...rochip.com>
---
Notes:
No changes in v3
New in v2.
drivers/mtd/spi-nor/spansion.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c
index e487fd341a56..b0c5521c1e27 100644
--- a/drivers/mtd/spi-nor/spansion.c
+++ b/drivers/mtd/spi-nor/spansion.c
@@ -109,6 +109,7 @@ static int spi_nor_cypress_octal_dtr_enable(struct spi_nor *nor, bool enable)
static void s28hs512t_default_init(struct spi_nor *nor)
{
nor->params->octal_dtr_enable = spi_nor_cypress_octal_dtr_enable;
+ nor->params->writesize = 16;
}
static void s28hs512t_post_sfdp_fixup(struct spi_nor *nor)
--
2.28.0
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