linux-kernel - Re: [PATCH 1/8] clk: sunxi-ng: h6: Fix clock divider range on some clocks

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Message-ID: <2017247.PyFJg3gf1G@kista>
Date:   Wed, 02 Dec 2020 17:17:03 +0100
From:   Jernej Škrabec <jernej.skrabec@...l.net>
To:     Maxime Ripard <mripard@...nel.org>, Chen-Yu Tsai <wens@...e.org>,
        Andre Przywara <andre.przywara@....com>
Cc:     Icenowy Zheng <icenowy@...c.xyz>,
        linux-arm-kernel@...ts.infradead.org, linux-sunxi@...glegroups.com,
        Linus Walleij <linus.walleij@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Yangtao Li <frank@...winnertech.com>,
        linux-kernel@...r.kernel.org,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>, linux-clk@...r.kernel.org,
        Andre Przywara <andre.przywara@....com>
Subject: Re: [PATCH 1/8] clk: sunxi-ng: h6: Fix clock divider range on some clocks

Dne sreda, 02. december 2020 ob 14:54:02 CET je Andre Przywara napisal(a):
> While comparing clocks between the H6 and H616, some of the M factor
> ranges were found to be wrong: the manual says they are only covering
> two bits [1:0], but our code had "5" in the number-of-bits field.
> 
> By writing 0xff into that register in U-Boot and via FEL, it could be
> confirmed that bits [4:2] are indeed masked off, so the manual is right.
> 
> Change to number of bits in the affected clock's description.
> 
> Fixes: 524353ea480b ("clk: sunxi-ng: add support for the Allwinner H6 CCU")
> Signed-off-by: Andre Przywara <andre.przywara@....com>

Reviewed-by: Jernej Skrabec <jernej.skrabec@...l.net>

Best regards,
Jernej