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Message-ID: <160703926836.3364.14013734584487863383.tip-bot2@tip-bot2>
Date: Thu, 03 Dec 2020 23:47:48 -0000
From: "tip-bot2 for Kefeng Wang" <tip-bot2@...utronix.de>
To: linux-tip-commits@...r.kernel.org
Cc: Kefeng Wang <wangkefeng.wang@...wei.com>,
Palmer Dabbelt <palmerdabbelt@...gle.com>,
Daniel Lezcano <daniel.lezcano@...aro.org>, x86@...nel.org,
linux-kernel@...r.kernel.org
Subject: [tip: timers/core] clocksource/drivers/riscv: Make RISCV_TIMER
depends on RISCV_SBI
The following commit has been merged into the timers/core branch of tip:
Commit-ID: ab3105446f1ec4e98fadfc998ee24feec271c16c
Gitweb: https://git.kernel.org/tip/ab3105446f1ec4e98fadfc998ee24feec271c16c
Author: Kefeng Wang <wangkefeng.wang@...wei.com>
AuthorDate: Wed, 28 Oct 2020 21:12:30 +08:00
Committer: Daniel Lezcano <daniel.lezcano@...aro.org>
CommitterDate: Thu, 03 Dec 2020 19:16:26 +01:00
clocksource/drivers/riscv: Make RISCV_TIMER depends on RISCV_SBI
The riscv timer is set via SBI timer call, let's make RISCV_TIMER
depends on RISCV_SBI, and it also fixes some build issue.
Fixes: d5be89a8d118 ("RISC-V: Resurrect the MMIO timer implementation for M-mode systems")
Signed-off-by: Kefeng Wang <wangkefeng.wang@...wei.com>
Reviewed-by: Palmer Dabbelt <palmerdabbelt@...gle.com>
Acked-by: Palmer Dabbelt <palmerdabbelt@...gle.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@...aro.org>
Link: https://lore.kernel.org/r/20201028131230.72907-1-wangkefeng.wang@huawei.com
---
drivers/clocksource/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index 390c27c..9f00b83 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -644,7 +644,7 @@ config ATCPIT100_TIMER
config RISCV_TIMER
bool "Timer for the RISC-V platform" if COMPILE_TEST
- depends on GENERIC_SCHED_CLOCK && RISCV
+ depends on GENERIC_SCHED_CLOCK && RISCV && RISCV_SBI
select TIMER_PROBE
select TIMER_OF
help
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