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Message-ID: <160698645173.3364.15000684811253542109.tip-bot2@tip-bot2>
Date: Thu, 03 Dec 2020 09:07:31 -0000
From: "tip-bot2 for Stephane Eranian" <tip-bot2@...utronix.de>
To: linux-tip-commits@...r.kernel.org
Cc: Namhyung Kim <namhyung@...nel.org>,
Stephane Eranian <eranian@...gle.com>,
"Peter Zijlstra (Intel)" <peterz@...radead.org>, x86@...nel.org,
linux-kernel@...r.kernel.org
Subject: [tip: perf/urgent] perf/x86/intel: Check PEBS status correctly
The following commit has been merged into the perf/urgent branch of tip:
Commit-ID: fc17db8aa4c53cbd2d5469bb0521ea0f0a6dbb27
Gitweb: https://git.kernel.org/tip/fc17db8aa4c53cbd2d5469bb0521ea0f0a6dbb27
Author: Stephane Eranian <eranian@...gle.com>
AuthorDate: Thu, 26 Nov 2020 20:09:22 +09:00
Committer: Peter Zijlstra <peterz@...radead.org>
CommitterDate: Thu, 03 Dec 2020 10:00:26 +01:00
perf/x86/intel: Check PEBS status correctly
The kernel cannot disambiguate when 2+ PEBS counters overflow at the
same time. This is what the comment for this code suggests. However,
I see the comparison is done with the unfiltered p->status which is a
copy of IA32_PERF_GLOBAL_STATUS at the time of the sample. This
register contains more than the PEBS counter overflow bits. It also
includes many other bits which could also be set.
Signed-off-by: Namhyung Kim <namhyung@...nel.org>
Signed-off-by: Stephane Eranian <eranian@...gle.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@...radead.org>
Link: https://lkml.kernel.org/r/20201126110922.317681-2-namhyung@kernel.org
---
arch/x86/events/intel/ds.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c
index 89dba58..485c506 100644
--- a/arch/x86/events/intel/ds.c
+++ b/arch/x86/events/intel/ds.c
@@ -1916,7 +1916,7 @@ static void intel_pmu_drain_pebs_nhm(struct pt_regs *iregs, struct perf_sample_d
* that caused the PEBS record. It's called collision.
* If collision happened, the record will be dropped.
*/
- if (p->status != (1ULL << bit)) {
+ if (pebs_status != (1ULL << bit)) {
for_each_set_bit(i, (unsigned long *)&pebs_status, size)
error[i]++;
continue;
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