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Message-ID: <20201203094914.GE3306@suse.de>
Date: Thu, 3 Dec 2020 09:49:14 +0000
From: Mel Gorman <mgorman@...e.de>
To: Peter Zijlstra <peterz@...radead.org>
Cc: Valentin Schneider <valentin.schneider@....com>,
Barry Song <song.bao.hua@...ilicon.com>,
catalin.marinas@....com, will@...nel.org, rjw@...ysocki.net,
lenb@...nel.org, gregkh@...uxfoundation.org,
Jonathan.Cameron@...wei.com, mingo@...hat.com,
juri.lelli@...hat.com, vincent.guittot@...aro.org,
dietmar.eggemann@....com, rostedt@...dmis.org, bsegall@...gle.com,
mark.rutland@....com, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, linux-acpi@...r.kernel.org,
linuxarm@...wei.com, xuwei5@...wei.com, prime.zeng@...ilicon.com
Subject: Re: [RFC PATCH v2 2/2] scheduler: add scheduler level for clusters
On Thu, Dec 03, 2020 at 10:28:31AM +0100, Peter Zijlstra wrote:
> On Tue, Dec 01, 2020 at 04:04:04PM +0000, Valentin Schneider wrote:
> >
> > Gating this behind this new config only leveraged by arm64 doesn't make it
> > very generic. Note that powerpc also has this newish "CACHE" level which
> > seems to overlap in function with your "CLUSTER" one (both are arch
> > specific, though).
> >
> > I think what you are after here is an SD_SHARE_PKG_RESOURCES domain walk,
> > i.e. scan CPUs by increasing cache "distance". We already have it in some
> > form, as we scan SMT & LLC domains; AFAICT LLC always maps to MC, except
> > for said powerpc's CACHE thingie.
>
> There's some intel chips with a smaller L2, but I don't think we ever
> bothered.
>
> There's also the extended topology stuff from Intel: SMT, Core, Module,
> Tile, Die, of which we've only partially used Die I think.
>
> Whatever we do, it might make sense to not all use different names.
>
> Also, I think Mel said he was cooking something for
> select_idle_balance().
>
> Also, I've previously posted patches that fold all the iterations into
> one, so it might make sense to revisit some of that if Mel also already
> didn.t
I didn't. The NUMA/lb reconcilation took most of my attention and right
now I'm looking at select_idle_sibling again in preparation for tracking
the idle cpumask in a sensible fashion. The main idea I had in mind was
special casing EPYC as it has multiple small L3 caches that may benefit
from select_idle_sibling looking slightly beyond the LLC as a search
domain but it has not even started yet.
--
Mel Gorman
SUSE Labs
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