lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Thu, 03 Dec 2020 11:45:24 +0000
From:   Marc Zyngier <maz@...nel.org>
To:     Rongwei Wang <rongwei.wang@...ux.alibaba.com>
Cc:     catalin.marinas@....com, Will Deacon <will@...nel.org>,
        bjorn.andersson@...aro.org, shawnguo@...nel.org, gshan@...hat.com,
        geert+renesas@...der.be, Anson.Huang@....com, masahiroy@...nel.org,
        michael@...le.cc, krzk@...nel.org, linux-kernel@...r.kernel.org,
        vkoul@...nel.org, olof@...om.net, vincenzo.frascino@....com,
        ardb@...nel.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH 0/3] arm64:msr: Add MSR driver

On 2020-12-03 11:25, Rongwei Wang wrote:
>> 2020年12月3日 下午4:35,Marc Zyngier <maz@...nel.org> 写道:

[...]

>> But what does it mean to change random system registers while the 
>> kernel
>> itself is using them in parallel? All you are introducing is a bunch 
>> of
>> uncontrolled, unexpected, and possibly fatal side effects.
> This problem exists when writing to a register, but it does not exist
> when reading a register.

If you're not aware that the ARM architecture does have system registers
with read side-effects, you really shouldn't be writing this code.

         M.
-- 
Jazz is not dead. It just smells funny...

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ