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Message-ID: <20201203133451.17716-3-vidyas@nvidia.com>
Date:   Thu, 3 Dec 2020 19:04:48 +0530
From:   Vidya Sagar <vidyas@...dia.com>
To:     <lorenzo.pieralisi@....com>, <robh+dt@...nel.org>,
        <bhelgaas@...gle.com>, <thierry.reding@...il.com>,
        <jonathanh@...dia.com>, <amanharitsh123@...il.com>,
        <dinghao.liu@....edu.cn>, <kw@...ux.com>
CC:     <linux-pci@...r.kernel.org>, <linux-tegra@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <kthota@...dia.com>,
        <mmaddireddy@...dia.com>, <vidyas@...dia.com>, <sagar.tv@...il.com>
Subject: [PATCH V5 2/5] PCI: tegra: Set DesignWare IP version

Set the DesignWare IP version for Tegra194 to 0x490A. This would be used
by the DesigWare sub-system to do any version specific configuration
(Ex:- TD bit programming for ECRC).

Tested-by: Thierry Reding <treding@...dia.com>
Signed-off-by: Vidya Sagar <vidyas@...dia.com>
Acked-by: Thierry Reding <treding@...dia.com>
---
V5:
* Added Tested-by and Acked-by from Thierry Reding

V4:
* None

V3:
* None

V2:
* None

 drivers/pci/controller/dwc/pcie-tegra194.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
index 4c966e9adb2b..59163b735c96 100644
--- a/drivers/pci/controller/dwc/pcie-tegra194.c
+++ b/drivers/pci/controller/dwc/pcie-tegra194.c
@@ -1984,6 +1984,7 @@ static int tegra_pcie_dw_probe(struct platform_device *pdev)
 	pci->ops = &tegra_dw_pcie_ops;
 	pci->n_fts[0] = N_FTS_VAL;
 	pci->n_fts[1] = FTS_VAL;
+	pci->version = 0x490A;
 
 	pp = &pci->pp;
 	pp->num_vectors = MAX_MSI_IRQS;
-- 
2.17.1

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