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Message-Id: <20201204193540.3047030-2-swboyd@chromium.org>
Date: Fri, 4 Dec 2020 11:35:38 -0800
From: Stephen Boyd <swboyd@...omium.org>
To: Mark Brown <broonie@...nel.org>
Cc: linux-kernel@...r.kernel.org, linux-spi@...r.kernel.org,
Benson Leung <bleung@...omium.org>,
linux-arm-msm@...r.kernel.org,
Enric Balletbo i Serra <enric.balletbo@...labora.com>,
Simon Glass <sjg@...omium.org>,
Gwendal Grignou <gwendal@...omium.org>,
Douglas Anderson <dianders@...omium.org>,
Alexandru M Stan <amstan@...omium.org>
Subject: [PATCH 1/3] platform/chrome: cros_ec_spi: Don't overwrite spi::mode
There isn't any need to overwrite the mode here in the driver with what
has been detected by the firmware, such as DT or ACPI. In fact, if we
use the SPI CS gpio descriptor feature we will overwrite the mode with
SPI_MODE_0 where it already contains SPI_MODE_0 and more importantly
SPI_CS_HIGH. Clearing the SPI_CS_HIGH bit causes the CS line to toggle
when the device is probed when it shouldn't change, confusing the driver
and making it fail to probe. Drop the assignment and let the spi core
take care of it.
Fixes: a17d94f0b6e1 ("mfd: Add ChromeOS EC SPI driver")
Cc: Simon Glass <sjg@...omium.org>
Cc: Gwendal Grignou <gwendal@...omium.org>
Reviewed-by: Douglas Anderson <dianders@...omium.org>
Tested-by: Douglas Anderson <dianders@...omium.org>
Acked-by: Enric Balletbo i Serra <enric.balletbo@...labora.com>
Cc: Alexandru M Stan <amstan@...omium.org>
Signed-off-by: Stephen Boyd <swboyd@...omium.org>
---
drivers/platform/chrome/cros_ec_spi.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/platform/chrome/cros_ec_spi.c b/drivers/platform/chrome/cros_ec_spi.c
index dfa1f816a45f..f9df218fc2bb 100644
--- a/drivers/platform/chrome/cros_ec_spi.c
+++ b/drivers/platform/chrome/cros_ec_spi.c
@@ -742,7 +742,6 @@ static int cros_ec_spi_probe(struct spi_device *spi)
int err;
spi->bits_per_word = 8;
- spi->mode = SPI_MODE_0;
spi->rt = true;
err = spi_setup(spi);
if (err < 0)
--
https://chromeos.dev
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