linux-kernel - Re: [PATCH v3 11/13] dt-bindings: tegra: Update csi data-lanes to maximum 8 lanes

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Message-ID: <20201204124920.GL4351@valkosipuli.retiisi.org.uk>
Date:   Fri, 4 Dec 2020 14:49:21 +0200
From:   Sakari Ailus <sakari.ailus@....fi>
To:     Sowjanya Komatineni <skomatineni@...dia.com>
Cc:     thierry.reding@...il.com, jonathanh@...dia.com, hverkuil@...all.nl,
        robh+dt@...nel.org, bparrot@...com, mchehab@...nel.org,
        linux-media@...r.kernel.org, linux-tegra@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 11/13] dt-bindings: tegra: Update csi data-lanes to
 maximum 8 lanes

On Thu, Dec 03, 2020 at 11:00:00AM -0800, Sowjanya Komatineni wrote:
> Tegra VI/CSI hardware don't have native 8 lane CSI RX port.
> 
> But x8 capture can be supported by using consecutive x4 ports
> simultaneously with HDMI-to-CSI bridges where source image is split
> on to two x4 ports.
> 
> This patch updates dt-bindings for csi endpoint data-lane property
> with maximum of 8 lanes.
> 
> Signed-off-by: Sowjanya Komatineni <skomatineni@...dia.com>

Acked-by: Sakari Ailus <sakari.ailus@...ux.intel.com>

-- 
Sakari Ailus