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Message-ID: <1ff86943-3f58-b57c-b3db-c3a92af79d2b@linaro.org>
Date: Sat, 5 Dec 2020 19:30:20 +0100
From: Daniel Lezcano <daniel.lezcano@...aro.org>
To: Marc Zyngier <maz@...nel.org>
Cc: Keqian Zhu <zhukeqian1@...wei.com>, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, kvmarm@...ts.cs.columbia.edu,
kvm@...r.kernel.org, Thomas Gleixner <tglx@...utronix.de>,
Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will@...nel.org>,
James Morse <james.morse@....com>,
Suzuki K Poulose <suzuki.poulose@....com>,
Sean Christopherson <sean.j.christopherson@...el.com>,
Julien Thierry <julien.thierry.kdev@...il.com>,
Mark Brown <broonie@...nel.org>,
Andrew Morton <akpm@...ux-foundation.org>,
Alexios Zavras <alexios.zavras@...el.com>,
wanghaibin.wang@...wei.com
Subject: Re: [PATCH v3 2/2] clocksource: arm_arch_timer: Correct fault
programming of CNTKCTL_EL1.EVNTI
Hi Marc,
On 05/12/2020 19:22, Marc Zyngier wrote:
> Hi Daniel,
>
> On 2020-12-05 11:15, Daniel Lezcano wrote:
>> Hi Marc,
>>
>> are you fine with this patch ?
>
> I am, although there still isn't any justification for the pos/lsb
> rework in the commit message (and calling that variable lsb is somewhat
> confusing). If you are going to apply it, please consider adding
> the additional comment below.
Ok, I will do that.
Thanks for the additional comment
-- Daniel
>> On 04/12/2020 08:31, Keqian Zhu wrote:
>>> ARM virtual counter supports event stream, it can only trigger an event
>>> when the trigger bit (the value of CNTKCTL_EL1.EVNTI) of CNTVCT_EL0
>>> changes,
>>> so the actual period of event stream is 2^(cntkctl_evnti + 1). For
>>> example,
>>> when the trigger bit is 0, then virtual counter trigger an event for
>>> every
>>> two cycles.
>
> "While we're at it, rework the way we compute the trigger bit position by
> making it more obvious that when bits [n:n-1] are both set (with n being
> the most significant bit), we pick bit (n + 1)."
>
> With that:
>
> Acked-by: Marc Zyngier <maz@...nel.org>
>
> Thanks,
>
> M.
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