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Message-Id: <160733882472.3526398.13030595786733592233.b4-ty@kernel.org>
Date: Mon, 7 Dec 2020 11:05:23 +0000
From: Will Deacon <will@...nel.org>
To: iommu@...ts.linux-foundation.org,
Suravee Suthikulpanit <suravee.suthikulpanit@....com>,
linux-kernel@...r.kernel.org
Cc: catalin.marinas@....com, kernel-team@...roid.com,
Will Deacon <will@...nel.org>, brijesh.singh@....com,
Jon.Grimm@....com
Subject: Re: [PATCH] iommu/amd: Set DTE[IntTabLen] to represent 512 IRTEs
On Mon, 7 Dec 2020 03:19:20 -0600, Suravee Suthikulpanit wrote:
> According to the AMD IOMMU spec, the commit 73db2fc595f3
> ("iommu/amd: Increase interrupt remapping table limit to 512 entries")
> also requires the interrupt table length (IntTabLen) to be set to 9
> (power of 2) in the device table mapping entry (DTE).
Applied to arm64 (for-next/iommu/fixes), thanks!
[1/1] iommu/amd: Set DTE[IntTabLen] to represent 512 IRTEs
https://git.kernel.org/arm64/c/4165bf015ba9
Cheers,
--
Will
https://fixes.arm64.dev
https://next.arm64.dev
https://will.arm64.dev
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