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Message-ID: <20201207165945.GA430214@robh.at.kernel.org>
Date: Mon, 7 Dec 2020 10:59:45 -0600
From: Rob Herring <robh@...nel.org>
To: Liu Ying <victor.liu@....com>
Cc: linux-arm-kernel@...ts.infradead.org,
dri-devel@...ts.freedesktop.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, p.zabel@...gutronix.de,
airlied@...ux.ie, daniel@...ll.ch, shawnguo@...nel.org,
s.hauer@...gutronix.de, kernel@...gutronix.de, festevam@...il.com,
linux-imx@....com, maarten.lankhorst@...ux.intel.com,
mripard@...nel.org, tzimmermann@...e.de,
laurentiu.palcu@....nxp.com
Subject: Re: [PATCH v3 2/6] dt-bindings: display: imx: Add i.MX8qxp/qm PRG
binding
On Mon, Dec 07, 2020 at 11:20:56AM +0800, Liu Ying wrote:
> This patch adds bindings for i.MX8qxp/qm Display Prefetch Resolve Gasket.
>
> Signed-off-by: Liu Ying <victor.liu@....com>
> ---
> Note that this depends on the 'two cell binding' clock patch set which has
> already landed in Shawn's i.MX clk/imx git branch. Otherwise, imx8-lpcg.h
> won't be found.
>
> v2->v3:
> * No change.
>
> v1->v2:
> * Use new dt binding way to add clocks in the example.
>
> .../bindings/display/imx/fsl,imx8qxp-prg.yaml | 60 ++++++++++++++++++++++
> 1 file changed, 60 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-prg.yaml
>
> diff --git a/Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-prg.yaml b/Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-prg.yaml
> new file mode 100644
> index 00000000..d59e2db
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-prg.yaml
> @@ -0,0 +1,60 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-prg.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale i.MX8qm/qxp Display Prefetch Resolve Gasket
> +
> +maintainers:
> + - Liu Ying <victor.liu@....com>
> +
> +description: |
> + The i.MX8qm/qxp Prefetch Resolve Gasket (PRG) is a gasket interface between
> + RTRAM controller and Display Controller. The main function is to convert
> + the AXI interface to the RTRAM interface, which includes re-mapping the
> + ARADDR to a RTRAM address.
> +
> +properties:
> + compatible:
> + oneOf:
> + - const: fsl,imx8qxp-prg
> + - const: fsl,imx8qm-prg
Use enum instead of oneOf+const.
With that,
Reviewed-by: Rob Herring <robh@...nel.org>
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + items:
> + - description: rtram clock
> + - description: apb clock
> +
> + clock-names:
> + items:
> + - const: rtram
> + - const: apb
> +
> + power-domains:
> + maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - clock-names
> + - power-domains
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/imx8-lpcg.h>
> + #include <dt-bindings/firmware/imx/rsrc.h>
> + prg@...40000 {
> + compatible = "fsl,imx8qxp-prg";
> + reg = <0x56040000 0x10000>;
> + clocks = <&dc0_prg0_lpcg IMX_LPCG_CLK_0>,
> + <&dc0_prg0_lpcg IMX_LPCG_CLK_4>;
> + clock-names = "rtram", "apb";
> + power-domains = <&pd IMX_SC_R_DC_0>;
> + };
> --
> 2.7.4
>
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