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Date: Wed, 9 Dec 2020 14:16:27 -0600 From: Rob Herring <robh@...nel.org> To: Sowjanya Komatineni <skomatineni@...dia.com> Cc: jonathanh@...dia.com, bparrot@...com, hverkuil@...all.nl, mchehab@...nel.org, linux-media@...r.kernel.org, devicetree@...r.kernel.org, thierry.reding@...il.com, linux-tegra@...r.kernel.org, sakari.ailus@....fi, robh+dt@...nel.org, linux-kernel@...r.kernel.org Subject: Re: [PATCH v3 11/13] dt-bindings: tegra: Update csi data-lanes to maximum 8 lanes On Thu, 03 Dec 2020 11:00:00 -0800, Sowjanya Komatineni wrote: > Tegra VI/CSI hardware don't have native 8 lane CSI RX port. > > But x8 capture can be supported by using consecutive x4 ports > simultaneously with HDMI-to-CSI bridges where source image is split > on to two x4 ports. > > This patch updates dt-bindings for csi endpoint data-lane property > with maximum of 8 lanes. > > Signed-off-by: Sowjanya Komatineni <skomatineni@...dia.com> > --- > .../devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > Acked-by: Rob Herring <robh@...nel.org>
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