linux-kernel - Re: [PATCH v2 01/12] x86/xen: use specific Xen pv interrupt entry for MCE

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <877dpqlmjw.fsf@nanos.tec.linutronix.de>
Date:   Wed, 09 Dec 2020 22:03:15 +0100
From:   Thomas Gleixner <tglx@...utronix.de>
To:     Juergen Gross <jgross@...e.com>, xen-devel@...ts.xenproject.org,
        x86@...nel.org, linux-kernel@...r.kernel.org
Cc:     peterz@...radead.org, luto@...nel.org,
        Juergen Gross <jgross@...e.com>,
        Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
        "H. Peter Anvin" <hpa@...or.com>,
        Boris Ostrovsky <boris.ostrovsky@...cle.com>,
        Stefano Stabellini <sstabellini@...nel.org>
Subject: Re: [PATCH v2 01/12] x86/xen: use specific Xen pv interrupt entry for MCE

On Fri, Nov 20 2020 at 12:46, Juergen Gross wrote:

> Xen PV guests don't use IST. For machine check interrupts switch to
> the same model as debug interrupts.
>
> Signed-off-by: Juergen Gross <jgross@...e.com>
> Acked-by: Peter Zijlstra (Intel) <peterz@...radead.org>

Reviewed-by: Thomas Gleixner <tglx@...utronix.de>