linux-kernel - [PATCH -next 3/3] arm64: dts: sparx5: Add SGPIO irq support

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Date:   Wed, 9 Dec 2020 15:27:53 +0100
From:   Lars Povlsen <lars.povlsen@...rochip.com>
To:     Linus Walleij <linus.walleij@...aro.org>
CC:     Lars Povlsen <lars.povlsen@...rochip.com>,
        Microchip Linux Driver Support <UNGLinuxDriver@...rochip.com>,
        <devicetree@...r.kernel.org>, <linux-gpio@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>,
        Alexandre Belloni <alexandre.belloni@...tlin.com>
Subject: [PATCH -next 3/3] arm64: dts: sparx5: Add SGPIO irq support

This enables irq support for the SGPIO input banks, allowing SGPIO
control signals to generate interrupts based on the signal state.

This f.ex. allows the SFP driver to avoid polling of module detect, tx
fault, loss of signal etc. control signals that may be connected via
the SGPIO controller.

Signed-off-by: Lars Povlsen <lars.povlsen@...rochip.com>
---
 arch/arm64/boot/dts/microchip/sparx5.dtsi | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/microchip/sparx5.dtsi b/arch/arm64/boot/dts/microchip/sparx5.dtsi
index 3bb4755e9f87..044063a9beae 100644
--- a/arch/arm64/boot/dts/microchip/sparx5.dtsi
+++ b/arch/arm64/boot/dts/microchip/sparx5.dtsi
@@ -277,13 +277,16 @@ sgpio0: gpio@...01036c {
 			clocks = <&sys_clk>;
 			pinctrl-0 = <&sgpio0_pins>;
 			pinctrl-names = "default";
-			reg = <0x6 0x1101036c 0x100>;
+			reg = <0x6 0x1101036c 0x118>;
 			sgpio_in0: gpio@0 {
 				compatible = "microchip,sparx5-sgpio-bank";
 				reg = <0>;
 				gpio-controller;
 				#gpio-cells = <3>;
 				ngpios = <96>;
+				interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+				interrupt-controller;
+				#interrupt-cells = <3>;
 			};
 			sgpio_out0: gpio@1 {
 				compatible = "microchip,sparx5-sgpio-bank";
@@ -309,6 +312,9 @@ sgpio_in1: gpio@0 {
 				gpio-controller;
 				#gpio-cells = <3>;
 				ngpios = <96>;
+				interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
+				interrupt-controller;
+				#interrupt-cells = <3>;
 			};
 			sgpio_out1: gpio@1 {
 				compatible = "microchip,sparx5-sgpio-bank";
@@ -334,6 +340,9 @@ sgpio_in2: gpio@0 {
 				gpio-controller;
 				#gpio-cells = <3>;
 				ngpios = <96>;
+				interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+				interrupt-controller;
+				#interrupt-cells = <3>;
 			};
 			sgpio_out2: gpio@1 {
 				compatible = "microchip,sparx5-sgpio-bank";
-- 
2.25.1