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Message-ID: <20201210035554.GA1632991@robh.at.kernel.org>
Date:   Wed, 9 Dec 2020 21:55:54 -0600
From:   Rob Herring <robh@...nel.org>
To:     Yash Shah <yash.shah@...ive.com>
Cc:     linux-spi@...r.kernel.org, linux-serial@...r.kernel.org,
        broonie@...nel.org, linux-riscv@...ts.infradead.org,
        linux-i2c@...r.kernel.org, lee.jones@...aro.org,
        linux-kernel@...r.kernel.org, palmer@...belt.com,
        linux-gpio@...r.kernel.org, peter@...sgaard.com,
        robh+dt@...nel.org, paul.walmsley@...ive.com,
        aou@...s.berkeley.edu, u.kleine-koenig@...gutronix.de,
        bgolaszewski@...libre.com, gregkh@...uxfoundation.org,
        thierry.reding@...il.com, linux-pwm@...r.kernel.org,
        linus.walleij@...aro.org, andrew@...n.ch,
        devicetree@...r.kernel.org
Subject: Re: [PATCH v2 1/9] dt-bindings: riscv: Update DT binding docs to
 support SiFive FU740 SoC

On Tue, 08 Dec 2020 10:25:33 +0530, Yash Shah wrote:
> Add new compatible strings in cpus.yaml to support the E71 and U74 CPU
> cores ("harts") that are present on FU740-C000 SoC.
> 
> Signed-off-by: Yash Shah <yash.shah@...ive.com>
> ---
>  Documentation/devicetree/bindings/riscv/cpus.yaml | 6 ++++++
>  1 file changed, 6 insertions(+)
> 

Reviewed-by: Rob Herring <robh@...nel.org>

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