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Date: Thu, 10 Dec 2020 08:22:16 +0800 From: Yifeng Zhao <yifeng.zhao@...k-chips.com> To: miquel.raynal@...tlin.com, richard@....at, vigneshr@...com, robh+dt@...nel.org Cc: devicetree@...r.kernel.org, linux-mtd@...ts.infradead.org, heiko@...ech.de, linux-rockchip@...ts.infradead.org, linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org, Yifeng Zhao <yifeng.zhao@...k-chips.com> Subject: [PATCH v16 5/8] arm64: dts: rockchip: Add NFC node for PX30 SoC Add NAND FLASH Controller(NFC) node for PX30 SoC. Signed-off-by: Yifeng Zhao <yifeng.zhao@...k-chips.com> --- Changes in v16: None Changes in v15: None Changes in v14: None Changes in v13: None Changes in v12: None Changes in v11: None Changes in v10: None Changes in v9: None Changes in v8: None Changes in v7: None Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None arch/arm64/boot/dts/rockchip/px30.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi index 2695ea8cda14..6cd67e80d623 100644 --- a/arch/arm64/boot/dts/rockchip/px30.dtsi +++ b/arch/arm64/boot/dts/rockchip/px30.dtsi @@ -973,6 +973,21 @@ status = "disabled"; }; + nfc: nand-controller@...b0000 { + compatible = "rockchip,px30-nfc"; + reg = <0x0 0xff3b0000 0x0 0x4000>; + interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru HCLK_NANDC>, <&cru SCLK_NANDC>; + clock-names = "ahb", "nfc"; + assigned-clocks = <&cru SCLK_NANDC>; + assigned-clock-rates = <150000000>; + pinctrl-names = "default"; + pinctrl-0 = <&flash_ale &flash_bus8 &flash_cle &flash_cs0 + &flash_rdn &flash_rdy &flash_wrn &flash_dqs>; + power-domains = <&power PX30_PD_MMC_NAND>; + status = "disabled"; + }; + gpu: gpu@...00000 { compatible = "rockchip,px30-mali", "arm,mali-bifrost"; reg = <0x0 0xff400000 0x0 0x4000>; -- 2.17.1
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