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Message-ID: <1607591262-21736-2-git-send-email-yongqiang.niu@mediatek.com>
Date: Thu, 10 Dec 2020 17:07:37 +0800
From: Yongqiang Niu <yongqiang.niu@...iatek.com>
To: CK Hu <ck.hu@...iatek.com>, Philipp Zabel <p.zabel@...gutronix.de>,
Rob Herring <robh+dt@...nel.org>,
Matthias Brugger <matthias.bgg@...il.com>
CC: David Airlie <airlied@...ux.ie>, Daniel Vetter <daniel@...ll.ch>,
Mark Rutland <mark.rutland@....com>,
<dri-devel@...ts.freedesktop.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-mediatek@...ts.infradead.org>,
Yongqiang Niu <yongqiang.niu@...iatek.com>
Subject: [PATCH v8, 1/6] dt-bindings: mediatek: add rdma_fifo_size description for mt8183 display
rdma fifo size may be different even in same SOC, add this
property to the corresponding rdma
Signed-off-by: Yongqiang Niu <yongqiang.niu@...iatek.com>
---
.../bindings/display/mediatek/mediatek,disp.txt | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
index 1212207..64c64ee 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
@@ -66,6 +66,13 @@ Required properties (DMA function blocks):
argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
for details.
+Optional properties (RDMA function blocks):
+- mediatek,rdma_fifo_size: rdma fifo size may be different even in same SOC, add this
+ property to the corresponding rdma
+ the value is the Max value which defined in hardware data sheet.
+ rdma_fifo_size of rdma0 in mt8183 is 5120
+ rdma_fifo_size of rdma1 in mt8183 is 2048
+
Examples:
mmsys: clock-controller@...00000 {
@@ -207,3 +214,12 @@ od@...23000 {
power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
clocks = <&mmsys CLK_MM_DISP_OD>;
};
+
+rdma1: rdma@...0c000 {
+ compatible = "mediatek,mt8183-disp-rdma";
+ reg = <0 0x1400c000 0 0x1000>;
+ interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_LOW>;
+ power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>;
+ clocks = <&mmsys CLK_MM_DISP_RDMA1>;
+ mediatek,rdma_fifo_size = <2048>;
+};
--
1.8.1.1.dirty
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