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Message-Id: <160761114382.21392.11608975856655590224.b4-ty@arm.com>
Date: Thu, 10 Dec 2020 14:39:35 +0000
From: Lorenzo Pieralisi <lorenzo.pieralisi@....com>
To: Bjorn Helgaas <bhelgaas@...gle.com>,
Rob Herring <robh+dt@...nel.org>,
Tom Joseph <tjoseph@...ence.com>,
Kishon Vijay Abraham I <kishon@...com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
linux-arm-kernel@...ts.infradead.org, linux-omap@...r.kernel.org,
linux-pci@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [RESEND PATCH 0/4] PCI: J7: J7200/J721E PCIe bindings
On Thu, 10 Dec 2020 18:19:13 +0530, Kishon Vijay Abraham I wrote:
> Patch series adds PCIe binding for J7200 and and fixes
> "ti,syscon-pcie-ctrl" applicable to both J721E and J7200.
>
> All the four patches here have got Acks from Rob Herring.
>
> Ack for "dt-bindings: pci: ti,j721e: Fix "ti,syscon-pcie-ctrl" to take
> argument"
> lore.kernel.org/r/CAL_JsqJQju8TUZA-wu=WA-5XH4H9s2ifO8Hf4TnT5epa=Gg1ng@...l.gmail.com
>
> [...]
Applied to pci/cadence, thanks!
[1/4] dt-bindings: pci: ti,j721e: Fix "ti,syscon-pcie-ctrl" to take argument
https://git.kernel.org/lpieralisi/pci/c/b6c81be912
[2/4] dt-bindings: PCI: Add host mode dt-bindings for TI's J7200 SoC
https://git.kernel.org/lpieralisi/pci/c/3f1f870c01
[3/4] dt-bindings: PCI: Add EP mode dt-bindings for TI's J7200 SoC
https://git.kernel.org/lpieralisi/pci/c/17c5b458a9
[4/4] PCI: j721e: Get offset within "syscon" from "ti,syscon-pcie-ctrl" phandle arg
https://git.kernel.org/lpieralisi/pci/c/7aa256234c
Thanks,
Lorenzo
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